{"id":"https://openalex.org/W7147505798","doi":"https://doi.org/10.1109/lascas67804.2026.11457167","title":"Power-Performance Analysis of a Softcore RISC-V SoC With CNN Accelerators for In-Orbit Computing","display_name":"Power-Performance Analysis of a Softcore RISC-V SoC With CNN Accelerators for In-Orbit Computing","publication_year":2026,"publication_date":"2026-02-24","ids":{"openalex":"https://openalex.org/W7147505798","doi":"https://doi.org/10.1109/lascas67804.2026.11457167"},"language":null,"primary_location":{"id":"doi:10.1109/lascas67804.2026.11457167","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas67804.2026.11457167","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE 17th Latin America Symposium on Circuits and System (LASCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5132591870","display_name":"Vicente K. Veiga","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Vicente K. Veiga","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil"],"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069385208","display_name":"F\u00e1bio Benevenuti","orcid":"https://orcid.org/0000-0002-0996-9470"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Fabio Benevenuti","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil"],"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004054419","display_name":"Ulisses Maffazioli","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Ulisses Maffazioli","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil"],"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081881281","display_name":"Arthur F. Ely","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Arthur F. Ely","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil"],"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5128154402","display_name":"Eduardo Mara\u00f1on","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Eduardo Mara\u00f1on","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil"],"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5132575683","display_name":"Antonio Carlos S. Beck","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Antonio Carlos S. Beck","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil"],"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046167370","display_name":"Jos\u00e9 Rodrigo Azambuja","orcid":"https://orcid.org/0000-0002-2627-5075"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Jos\u00e9 Rodrigo Azambuja","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil"],"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5132622201","display_name":"Fernanda L. Kastensmidt","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Fernanda L. Kastensmidt","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil"],"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PGMICRO,Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5132591870"],"corresponding_institution_ids":["https://openalex.org/I130442723"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.95468119,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.5619000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.5619000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.1031000018119812,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.06909999996423721,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7009999752044678},{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.5637999773025513},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.49639999866485596},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4189999997615814},{"id":"https://openalex.org/keywords/data-processing","display_name":"Data processing","score":0.37549999356269836},{"id":"https://openalex.org/keywords/window","display_name":"Window (computing)","score":0.3587000072002411},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.3529999852180481},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.32749998569488525},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.3034000098705292}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7651000022888184},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7009999752044678},{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.5637999773025513},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5205000042915344},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.49639999866485596},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49549999833106995},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4189999997615814},{"id":"https://openalex.org/C138827492","wikidata":"https://www.wikidata.org/wiki/Q6661985","display_name":"Data processing","level":2,"score":0.37549999356269836},{"id":"https://openalex.org/C2778751112","wikidata":"https://www.wikidata.org/wiki/Q835016","display_name":"Window (computing)","level":2,"score":0.3587000072002411},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.3529999852180481},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.32749998569488525},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.3034000098705292},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.29339998960494995},{"id":"https://openalex.org/C17349429","wikidata":"https://www.wikidata.org/wiki/Q1049914","display_name":"Matrix multiplication","level":3,"score":0.29269999265670776},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.2896000146865845},{"id":"https://openalex.org/C106515295","wikidata":"https://www.wikidata.org/wiki/Q26806595","display_name":"Parallel processing","level":2,"score":0.289000004529953},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.28360000252723694},{"id":"https://openalex.org/C118993495","wikidata":"https://www.wikidata.org/wiki/Q5042828","display_name":"Electrical efficiency","level":3,"score":0.2824999988079071},{"id":"https://openalex.org/C106487976","wikidata":"https://www.wikidata.org/wiki/Q685816","display_name":"Matrix (chemical analysis)","level":2,"score":0.2816999852657318},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.2773999869823456},{"id":"https://openalex.org/C557945733","wikidata":"https://www.wikidata.org/wiki/Q389772","display_name":"Data transmission","level":2,"score":0.2750999927520752},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.26350000500679016},{"id":"https://openalex.org/C2780365336","wikidata":"https://www.wikidata.org/wiki/Q25047934","display_name":"Single-core","level":2,"score":0.2587999999523163},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.25839999318122864},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.257099986076355},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.2531000077724457}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lascas67804.2026.11457167","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas67804.2026.11457167","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE 17th Latin America Symposium on Circuits and System (LASCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8048430681228638,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1916283398","https://openalex.org/W2075476171","https://openalex.org/W2152386163","https://openalex.org/W2211843587","https://openalex.org/W2479721190","https://openalex.org/W2565125333","https://openalex.org/W2964411820","https://openalex.org/W2987094173","https://openalex.org/W3034272847","https://openalex.org/W3046320443","https://openalex.org/W3194736841","https://openalex.org/W4409660255","https://openalex.org/W4412404446","https://openalex.org/W4414221789"],"related_works":[],"abstract_inverted_index":{"In":[0,53],"this":[1],"paper,":[2],"we":[3],"analyze":[4],"three":[5],"approaches":[6],"to":[7,36,64],"CNN":[8,57,79],"processing":[9,32],"for":[10],"image":[11],"classification":[12],"assisted":[13],"by":[14],"a":[15,20,30,47,96],"RISCV":[16],"microprocessor.":[17],"When":[18],"using":[19,55],"general-purpose":[21],"matrix":[22],"multiplication":[23],"(GEMM)":[24],"accelerator,":[25,66],"the":[26,40,62,65,75,78,83,89,103,106],"RISC-V":[27,43],"core":[28,44],"carried":[29],"larger":[31],"load,":[33],"primarily":[34],"related":[35],"data":[37,93],"movement,":[38],"and":[39,70,87],"choice":[41],"of":[42,61,77,91],"implementation":[45],"had":[46],"significant":[48],"impact":[49],"on":[50,82,88],"overall":[51],"performance.":[52],"contrast,":[54],"dedicated":[56],"accelerators":[58],"offloaded":[59],"most":[60],"computation":[63],"achieving":[67],"higher":[68,120],"performance":[69],"superior":[71],"power":[72,110],"efficiency.":[73],"However,":[74],"configuration":[76],"accelerator":[80,108],"depends":[81],"available":[84],"floorplan":[85],"area":[86,126],"presence":[90],"local":[92],"storage":[94],"or":[95],"communication":[97],"bus":[98],"with":[99,124],"comparable":[100],"throughput.":[101],"Among":[102],"evaluated":[104],"designs,":[105],"FINN":[107],"delivered":[109],"efficiency":[111],"(in":[112],"FPS/W)":[113],"approximately":[114,131],"<tex":[115,132],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[116,133],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$\\mathbf{3":[117],"0}":[118],"\\boldsymbol{\\times}$</tex>":[119],"than":[121],"alternative":[122],"implementations":[123],"smaller":[125],"requirements,":[127],"although":[128],"it":[129],"consumed":[130],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$3.5":[134],"\\times$</tex>":[135],"more":[136],"FPGA":[137],"resources.":[138]},"counts_by_year":[],"updated_date":"2026-04-02T13:53:19.096889","created_date":"2026-04-02T00:00:00"}