{"id":"https://openalex.org/W4409660255","doi":"https://doi.org/10.1109/lascas64004.2025.10966288","title":"Exploring Parallelism in ZynqNet AI Engine to Accelerate Image Classification in Aerospace","display_name":"Exploring Parallelism in ZynqNet AI Engine to Accelerate Image Classification in Aerospace","publication_year":2025,"publication_date":"2025-02-25","ids":{"openalex":"https://openalex.org/W4409660255","doi":"https://doi.org/10.1109/lascas64004.2025.10966288"},"language":"en","primary_location":{"id":"doi:10.1109/lascas64004.2025.10966288","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas64004.2025.10966288","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE 16th Latin America Symposium on Circuits and Systems (LASCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109167408","display_name":"Eduardo Mara\u00f1on Aguilar","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Eduardo Mara\u00f1on Aguilar","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS), Institute of Informatics, Microelectronics Graduate Program (PGMICRO),Porto Alegre,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS), Institute of Informatics, Microelectronics Graduate Program (PGMICRO),Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069385208","display_name":"F\u00e1bio Benevenuti","orcid":"https://orcid.org/0000-0002-0996-9470"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Fabio Benevenuti","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS), Institute of Informatics, Microelectronics Graduate Program (PGMICRO),Porto Alegre,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS), Institute of Informatics, Microelectronics Graduate Program (PGMICRO),Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024813896","display_name":"Fernanda Lima Kastensmidt","orcid":"https://orcid.org/0000-0001-5767-8582"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Fernanda Lima Kastensmidt","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS), Institute of Informatics, Microelectronics Graduate Program (PGMICRO),Porto Alegre,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS), Institute of Informatics, Microelectronics Graduate Program (PGMICRO),Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130442723"],"apc_list":null,"apc_paid":null,"fwci":0.8497,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.71165292,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10876","display_name":"Fault Detection and Control Systems","score":0.6322000026702881,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10876","display_name":"Fault Detection and Control Systems","score":0.6322000026702881,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.5702999830245972,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14474","display_name":"Industrial Technology and Control Systems","score":0.5663999915122986,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/aerospace","display_name":"Aerospace","score":0.7556279897689819},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.660546064376831},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.552496075630188},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.41379937529563904},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3860545754432678},{"id":"https://openalex.org/keywords/aerospace-engineering","display_name":"Aerospace engineering","score":0.1681073009967804},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1535983681678772}],"concepts":[{"id":"https://openalex.org/C167740415","wikidata":"https://www.wikidata.org/wiki/Q2876213","display_name":"Aerospace","level":2,"score":0.7556279897689819},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.660546064376831},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.552496075630188},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.41379937529563904},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3860545754432678},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.1681073009967804},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1535983681678772}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lascas64004.2025.10966288","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas64004.2025.10966288","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE 16th Latin America Symposium on Circuits and Systems (LASCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2094756095","https://openalex.org/W2289252105","https://openalex.org/W2942454403","https://openalex.org/W3044142842","https://openalex.org/W3081250697","https://openalex.org/W3115702157","https://openalex.org/W4308536741","https://openalex.org/W4313886938","https://openalex.org/W6778144003","https://openalex.org/W6861573725"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W4225795411","https://openalex.org/W2511013388","https://openalex.org/W2044192478","https://openalex.org/W2064861618","https://openalex.org/W2023505575","https://openalex.org/W1595672120","https://openalex.org/W4230999561"],"abstract_inverted_index":{"This":[0],"research":[1,151],"investigates":[2],"various":[3],"configurations":[4],"of":[5,100,145,178],"the":[6,16,27,40,88,95,98,137,169,176],"Zynqnet":[7],"AI":[8,51],"Engine":[9],"to":[10,55,132],"accelerate":[11],"image":[12],"classification":[13],"tasks":[14],"using":[15,34],"SAT-6":[17],"dataset":[18],"and":[19,37,65,90,120,126,139,147,156],"a":[20,45,80,107],"4-layer":[21],"CNN.":[22],"The":[23,50,150],"C++":[24],"code":[25],"for":[26,75,118,183],"hardware":[28,181],"accelerator":[29,89,138],"was":[30,53],"translated":[31],"into":[32,168],"RTL":[33],"Vivado":[35],"HLS":[36],"integrated":[38],"with":[39,57,71,87,142],"Zynq":[41],"Processing":[42],"System":[43],"on":[44],"ZedBoard":[46],"Zynq-7000":[47],"ARM/FPGA":[48],"SoC.":[49],"engine":[52],"configured":[54],"work":[56],"32":[58],"-bit":[59,67],"floating":[60],"point,":[61],"8bit":[62],"fixed":[63],"point":[64],"8":[66,114],"integer":[68,93],"type":[69],"operations,":[70],"different":[72,127],"processing":[73,101],"elements":[74,102],"parallelizing":[76],"CNN":[77,153,173],"tasks.":[78],"Given":[79],"64-bit":[81,123],"data":[82,134],"memory":[83],"bus":[84],"in":[85,97,106,122,171],"communication":[86,128],"an":[91],"8-bit":[92],"quantization,":[94],"variation":[96],"number":[99],"does":[103],"not":[104],"result":[105],"significant":[108],"performance":[109,155],"improvement.":[110],"To":[111],"address":[112],"this,":[113],"values":[115],"were":[116,130],"grouped":[117],"reading":[119],"writing":[121],"parallel":[124],"mode,":[125],"architectures":[129],"designed":[131],"improve":[133],"transfer":[135],"between":[136],"DDR":[140],"memory,":[141],"optional":[143],"enablement":[144],"L1D":[146],"L2":[148],"cache.":[149],"analyzes":[152],"computation":[154],"FPGA":[157],"resource":[158],"usage":[159],"(LUTs,":[160],"FFs,":[161],"BRAMs,":[162],"DSPs)":[163],"across":[164],"configurations,":[165],"providing":[166],"insights":[167],"trade-offs":[170],"FPGA-based":[172],"implementations,":[174],"aiding":[175],"development":[177],"efficient,":[179],"high-performance":[180],"accelerators":[182],"Deep":[184],"Learning":[185],"applications.":[186]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
