{"id":"https://openalex.org/W3173707903","doi":"https://doi.org/10.1109/lascas51355.2021.9459159","title":"Simulating large neural networks embedding MLC RRAM as weight storage considering device variations","display_name":"Simulating large neural networks embedding MLC RRAM as weight storage considering device variations","publication_year":2021,"publication_date":"2021-02-21","ids":{"openalex":"https://openalex.org/W3173707903","doi":"https://doi.org/10.1109/lascas51355.2021.9459159","mag":"3173707903"},"language":"en","primary_location":{"id":"doi:10.1109/lascas51355.2021.9459159","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas51355.2021.9459159","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5021976453","display_name":"Markus Fritscher","orcid":"https://orcid.org/0000-0003-2754-7287"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Markus Fritscher","raw_affiliation_strings":["Chair for Computer Architecture, Friedrich-Alexander-Universit&#x00E4;t,Erlangen,N&#x00FC;rnberg"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair for Computer Architecture, Friedrich-Alexander-Universit&#x00E4;t,Erlangen,N&#x00FC;rnberg","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021970080","display_name":"Johannes Kn\u00f6dtel","orcid":"https://orcid.org/0000-0002-7298-8252"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Johannes Kn\u00f6dtel","raw_affiliation_strings":["Chair for Computer Architecture, Friedrich-Alexander-Universit&#x00E4;t,Erlangen,N&#x00FC;rnberg"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair for Computer Architecture, Friedrich-Alexander-Universit&#x00E4;t,Erlangen,N&#x00FC;rnberg","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011211727","display_name":"Daniel Reiser","orcid":"https://orcid.org/0000-0003-0212-259X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Daniel Reiser","raw_affiliation_strings":["Chair for Computer Architecture, Friedrich-Alexander-Universit&#x00E4;t,Erlangen,N&#x00FC;rnberg"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair for Computer Architecture, Friedrich-Alexander-Universit&#x00E4;t,Erlangen,N&#x00FC;rnberg","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031226537","display_name":"Maen Mallah","orcid":null},"institutions":[{"id":"https://openalex.org/I4210124274","display_name":"Fraunhofer Institute for Integrated Circuits","ror":"https://ror.org/024ape423","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Maen Mallah","raw_affiliation_strings":["Fraunhofer IIS,Erlangen","Fraunhofer IIS, Erlangen"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fraunhofer IIS,Erlangen","institution_ids":["https://openalex.org/I4210124274"]},{"raw_affiliation_string":"Fraunhofer IIS, Erlangen","institution_ids":["https://openalex.org/I4210124274"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056540006","display_name":"Stefan Pechmann","orcid":"https://orcid.org/0000-0001-6890-3378"},"institutions":[{"id":"https://openalex.org/I54009628","display_name":"University of Bayreuth","ror":"https://ror.org/0234wmv40","country_code":"DE","type":"education","lineage":["https://openalex.org/I54009628"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Stefan Pechmann","raw_affiliation_strings":["Chair of Communications Electronics, Universit&#x00E4;t Bayreuth"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair of Communications Electronics, Universit&#x00E4;t Bayreuth","institution_ids":["https://openalex.org/I54009628"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030918623","display_name":"Dietmar Fey","orcid":"https://orcid.org/0000-0002-6077-4732"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Dietmar Fey","raw_affiliation_strings":["Chair for Computer Architecture, Friedrich-Alexander-Universit&#x00E4;t,Erlangen,N&#x00FC;rnberg"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair for Computer Architecture, Friedrich-Alexander-Universit&#x00E4;t,Erlangen,N&#x00FC;rnberg","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5014794132","display_name":"Marc Reichenbach","orcid":"https://orcid.org/0000-0002-9687-6247"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Marc Reichenbach","raw_affiliation_strings":["Chair for Computer Architecture, Friedrich-Alexander-Universit&#x00E4;t,Erlangen,N&#x00FC;rnberg"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair for Computer Architecture, Friedrich-Alexander-Universit&#x00E4;t,Erlangen,N&#x00FC;rnberg","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12676","display_name":"Machine Learning and ELM","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.75853431224823},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.7166002988815308},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7118829488754272},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.6422988176345825},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.5417429208755493},{"id":"https://openalex.org/keywords/embedding","display_name":"Embedding","score":0.49115607142448425},{"id":"https://openalex.org/keywords/fabrication","display_name":"Fabrication","score":0.4158518314361572},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.4114604890346527},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3916088342666626},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3706310987472534},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.34060555696487427},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.23301687836647034},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16244319081306458},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13536739349365234},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08071732521057129}],"concepts":[{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.75853431224823},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.7166002988815308},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7118829488754272},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.6422988176345825},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5417429208755493},{"id":"https://openalex.org/C41608201","wikidata":"https://www.wikidata.org/wiki/Q980509","display_name":"Embedding","level":2,"score":0.49115607142448425},{"id":"https://openalex.org/C136525101","wikidata":"https://www.wikidata.org/wiki/Q5428139","display_name":"Fabrication","level":3,"score":0.4158518314361572},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4114604890346527},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3916088342666626},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3706310987472534},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.34060555696487427},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.23301687836647034},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16244319081306458},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13536739349365234},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08071732521057129},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C142724271","wikidata":"https://www.wikidata.org/wiki/Q7208","display_name":"Pathology","level":1,"score":0.0},{"id":"https://openalex.org/C71924100","wikidata":"https://www.wikidata.org/wiki/Q11190","display_name":"Medicine","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C204787440","wikidata":"https://www.wikidata.org/wiki/Q188504","display_name":"Alternative medicine","level":2,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/lascas51355.2021.9459159","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas51355.2021.9459159","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:fraunhofer.de:N-641279","is_oa":false,"landing_page_url":"http://publica.fraunhofer.de/documents/N-641279.html","pdf_url":null,"source":{"id":"https://openalex.org/S4306400801","display_name":"Publikationsdatenbank der Fraunhofer-Gesellschaft (Fraunhofer-Gesellschaft)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4923324","host_organization_name":"Fraunhofer-Gesellschaft","host_organization_lineage":["https://openalex.org/I4923324"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Fraunhofer IIS","raw_type":"Conference Paper"},{"id":"pmh:oai:null:publica/413106","is_oa":false,"landing_page_url":"https://publica.fraunhofer.de/handle/publica/413106","pdf_url":null,"source":{"id":"https://openalex.org/S4306400318","display_name":"Fraunhofer-Publica (Fraunhofer-Gesellschaft)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4923324","host_organization_name":"Fraunhofer-Gesellschaft","host_organization_lineage":["https://openalex.org/I4923324"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"conference paper"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G5628577240","display_name":null,"funder_award_id":"FE 412/8-1,RE 4182/2-1","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"}],"funders":[{"id":"https://openalex.org/F4320320879","display_name":"Deutsche Forschungsgemeinschaft","ror":"https://ror.org/018mejw64"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1512867548","https://openalex.org/W2025604455","https://openalex.org/W2509848459","https://openalex.org/W2605663629","https://openalex.org/W2736591611","https://openalex.org/W2807837291","https://openalex.org/W2899749435","https://openalex.org/W2932447952","https://openalex.org/W2949588176","https://openalex.org/W3001525258","https://openalex.org/W3017900531","https://openalex.org/W3039320313","https://openalex.org/W3088811939","https://openalex.org/W3089558791","https://openalex.org/W6751953977"],"related_works":["https://openalex.org/W2545245183","https://openalex.org/W2054635671","https://openalex.org/W2017425642","https://openalex.org/W2350916061","https://openalex.org/W1970117475","https://openalex.org/W3161624601","https://openalex.org/W2611512961","https://openalex.org/W2078381924","https://openalex.org/W4206468571","https://openalex.org/W4381388454"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3,65],"present":[4],"a":[5,99,158],"method":[6],"to":[7,28,44,90,94,118,121,147,154],"evaluate":[8,122],"the":[9,17,32,67,91,115,139,155],"behavior":[10,33],"of":[11,20,34,70,124,138,150,157],"neuronal":[12],"network":[13,132],"(NN)":[14],"architectures,":[15,50,83],"concerning":[16],"error":[18],"rate":[19],"RRAM":[21,36,71],"devices":[22,37],"used":[23,75],"as":[24,76],"weight":[25,77],"storage,":[26],"relative":[27],"fabrication":[29,68],"variances.":[30],"While":[31],"non-ideal":[35],"can":[38,143],"cause":[39],"system":[40,92],"failures":[41],"(e.g.":[42],"due":[43],"bit":[45],"flips)":[46],"in":[47,79],"traditional":[48,159],"computer":[49],"NN":[51,82,100],"exhibit":[52],"inherent":[53],"redundancy":[54],"which":[55,73],"makes":[56],"these":[57,86],"applications":[58],"more":[59],"tolerant":[60],"against":[61],"device":[62,87,140],"variabilities.":[63],"Therefore,":[64],"analyze":[66],"variances":[69],"cells":[72],"are":[74],"storage":[78],"systolic":[80],"array-based":[81],"and":[84,97,113,142],"bring":[85],"level":[88,93],"properties":[89,141],"show,":[95],"if":[96],"how":[98],"application":[101],"will":[102],"be":[103,119],"affected.":[104],"Previous":[105],"works":[106],"were":[107],"based":[108],"on":[109],"Mixed":[110],"Signal":[111],"simulations":[112],"lack":[114],"needed":[116],"throughput":[117],"able":[120],"nets":[123],"meaningful":[125],"size.":[126],"Our":[127],"approach":[128],"uses":[129],"modern":[130],"neural":[131],"libraries":[133],"along":[134],"with":[135],"an":[136],"abstraction":[137],"thus":[144],"run":[145],"five":[146],"six":[148],"orders":[149],"magnitudes":[151],"faster":[152],"compared":[153],"results":[156],"approach.":[160]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
