{"id":"https://openalex.org/W3175006089","doi":"https://doi.org/10.1109/lascas51355.2021.9459120","title":"Pseudo-Differential Time-Domain Integrator Using Charge-Based Time-Domain Circuits","display_name":"Pseudo-Differential Time-Domain Integrator Using Charge-Based Time-Domain Circuits","publication_year":2021,"publication_date":"2021-02-21","ids":{"openalex":"https://openalex.org/W3175006089","doi":"https://doi.org/10.1109/lascas51355.2021.9459120","mag":"3175006089"},"language":"en","primary_location":{"id":"doi:10.1109/lascas51355.2021.9459120","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas51355.2021.9459120","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://lirias.kuleuven.be/bitstream/123456789/678707/2/preprint_LASCAS2021.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039310948","display_name":"Arijit Karmakar","orcid":"https://orcid.org/0000-0002-5345-0318"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Arijit Karmakar","raw_affiliation_strings":["ESAT-ADVISE research lab,Leuven,KU,Belgium","ESAT-ADVISE research lab, Leuven, KU, Belgium"],"affiliations":[{"raw_affiliation_string":"ESAT-ADVISE research lab,Leuven,KU,Belgium","institution_ids":[]},{"raw_affiliation_string":"ESAT-ADVISE research lab, Leuven, KU, Belgium","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083857679","display_name":"Valentijn De Smedt","orcid":"https://orcid.org/0000-0002-6385-253X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Valentijn De Smedt","raw_affiliation_strings":["ESAT-ADVISE research lab,Leuven,KU,Belgium","ESAT-ADVISE research lab, Leuven, KU, Belgium"],"affiliations":[{"raw_affiliation_string":"ESAT-ADVISE research lab,Leuven,KU,Belgium","institution_ids":[]},{"raw_affiliation_string":"ESAT-ADVISE research lab, Leuven, KU, Belgium","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016595959","display_name":"Paul Leroux","orcid":"https://orcid.org/0000-0002-1790-2428"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Paul Leroux","raw_affiliation_strings":["ESAT-ADVISE research lab,Leuven,KU,Belgium","ESAT-ADVISE research lab, Leuven, KU, Belgium"],"affiliations":[{"raw_affiliation_string":"ESAT-ADVISE research lab,Leuven,KU,Belgium","institution_ids":[]},{"raw_affiliation_string":"ESAT-ADVISE research lab, Leuven, KU, Belgium","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5039310948"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6016,"has_fulltext":true,"cited_by_count":7,"citation_normalized_percentile":{"value":0.66507923,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9929999709129333,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.8912590742111206},{"id":"https://openalex.org/keywords/time-domain","display_name":"Time domain","score":0.7560298442840576},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.612497091293335},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5763566493988037},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5546320676803589},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5271018743515015},{"id":"https://openalex.org/keywords/domain","display_name":"Domain (mathematical analysis)","score":0.4798959493637085},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.4541042745113373},{"id":"https://openalex.org/keywords/time-to-digital-converter","display_name":"Time-to-digital converter","score":0.4404144883155823},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.423348605632782},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3320138156414032},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.30705174803733826},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21739107370376587},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.15366646647453308}],"concepts":[{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.8912590742111206},{"id":"https://openalex.org/C103824480","wikidata":"https://www.wikidata.org/wiki/Q185889","display_name":"Time domain","level":2,"score":0.7560298442840576},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.612497091293335},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5763566493988037},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5546320676803589},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5271018743515015},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.4798959493637085},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.4541042745113373},{"id":"https://openalex.org/C99594498","wikidata":"https://www.wikidata.org/wiki/Q2434524","display_name":"Time-to-digital converter","level":4,"score":0.4404144883155823},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.423348605632782},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3320138156414032},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.30705174803733826},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21739107370376587},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.15366646647453308},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/lascas51355.2021.9459120","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas51355.2021.9459120","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:lirias2repo.kuleuven.be:123456789/678707","is_oa":true,"landing_page_url":"https://lirias.kuleuven.be/handle/123456789/678707","pdf_url":"https://lirias.kuleuven.be/bitstream/123456789/678707/2/preprint_LASCAS2021.pdf","source":{"id":"https://openalex.org/S4306401954","display_name":"Lirias (KU Leuven)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I99464096","host_organization_name":"KU Leuven","host_organization_lineage":["https://openalex.org/I99464096"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"12th IEEE Latin America Symposium on Circuits and System (LASCAS), ELECTR NETWORK, 22-25 February 2021","raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":{"id":"pmh:oai:lirias2repo.kuleuven.be:123456789/678707","is_oa":true,"landing_page_url":"https://lirias.kuleuven.be/handle/123456789/678707","pdf_url":"https://lirias.kuleuven.be/bitstream/123456789/678707/2/preprint_LASCAS2021.pdf","source":{"id":"https://openalex.org/S4306401954","display_name":"Lirias (KU Leuven)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I99464096","host_organization_name":"KU Leuven","host_organization_lineage":["https://openalex.org/I99464096"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"12th IEEE Latin America Symposium on Circuits and System (LASCAS), ELECTR NETWORK, 22-25 February 2021","raw_type":"info:eu-repo/semantics/publishedVersion"},"sustainable_development_goals":[{"score":0.800000011920929,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G6269984272","display_name":null,"funder_award_id":"721624","funder_id":"https://openalex.org/F4320332999","funder_display_name":"Horizon 2020 Framework Programme"}],"funders":[{"id":"https://openalex.org/F4320332999","display_name":"Horizon 2020 Framework Programme","ror":"https://ror.org/00k4n6c32"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W3175006089.pdf","grobid_xml":"https://content.openalex.org/works/W3175006089.grobid-xml"},"referenced_works_count":11,"referenced_works":["https://openalex.org/W2053424871","https://openalex.org/W2134713152","https://openalex.org/W2517094076","https://openalex.org/W2560521353","https://openalex.org/W2758584561","https://openalex.org/W2759627086","https://openalex.org/W2891153146","https://openalex.org/W2902288217","https://openalex.org/W2921104174","https://openalex.org/W2959661790","https://openalex.org/W3018598147"],"related_works":["https://openalex.org/W3217463396","https://openalex.org/W2790557758","https://openalex.org/W2516396101","https://openalex.org/W3204929712","https://openalex.org/W4295102875","https://openalex.org/W2015457513","https://openalex.org/W2850651093","https://openalex.org/W4319430278","https://openalex.org/W1593900539","https://openalex.org/W77791653"],"abstract_inverted_index":{"This":[0],"work":[1],"proposes":[2],"a":[3,22,54,61],"pseudo-differential":[4],"time-domain":[5,9,16,32],"integrator":[6],"using":[7,21],"half-delay":[8],"registers":[10],"and":[11,26,78],"adders":[12],"relying":[13],"on":[14],"charge-based":[15],"circuits.":[17],"It":[18,49],"is":[19,72],"implemented":[20],"65-nm":[23],"CMOS":[24],"Technology":[25],"performs":[27],"first":[28],"order":[29],"integration":[30],"of":[31,37,57],"information":[33],"within":[34],"the":[35],"range":[36],"[4":[38],"ns,":[39],"-4":[40],"ns]":[41],"across":[42],"temperature":[43,79],"-40\u00b0":[44],"C":[45],"to":[46,74],"80\u00b0":[47],"C.":[48],"consumes":[50],"740":[51],"\u03bcW":[52],"with":[53],"supply":[55],"voltage":[56],"1.2":[58],"V":[59],"at":[60],"100":[62],"MHz":[63],"clock":[64],"frequency.":[65],"A":[66],"delay-locked-loop":[67],"(DLL)":[68],"based":[69],"foreground":[70],"calibration":[71],"used":[73],"compensate":[75],"for":[76],"process":[77],"variations.":[80]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}