{"id":"https://openalex.org/W2811336796","doi":"https://doi.org/10.1109/lascas.2018.8399907","title":"Educational design kit for synopsys tools with a set of characterized standard cell library","display_name":"Educational design kit for synopsys tools with a set of characterized standard cell library","publication_year":2018,"publication_date":"2018-02-01","ids":{"openalex":"https://openalex.org/W2811336796","doi":"https://doi.org/10.1109/lascas.2018.8399907","mag":"2811336796"},"language":"en","primary_location":{"id":"doi:10.1109/lascas.2018.8399907","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas.2018.8399907","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE 9th Latin American Symposium on Circuits &amp; Systems (LASCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064096932","display_name":"Yao-Ming Kuo","orcid":"https://orcid.org/0000-0001-9752-6073"},"institutions":[{"id":"https://openalex.org/I128590013","display_name":"National Technological University","ror":"https://ror.org/04t730v47","country_code":"AR","type":"education","lineage":["https://openalex.org/I128590013"]}],"countries":["AR"],"is_corresponding":false,"raw_author_name":"Yao-Ming Kuo","raw_affiliation_strings":["UTN Universidad Tecnol\u00f3gica Nacional Facultad Regional Buenos Aires"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UTN Universidad Tecnol\u00f3gica Nacional Facultad Regional Buenos Aires","institution_ids":["https://openalex.org/I128590013"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007253266","display_name":"Leandro J. Arana","orcid":null},"institutions":[{"id":"https://openalex.org/I24354313","display_name":"Universidad de Buenos Aires","ror":"https://ror.org/0081fs513","country_code":"AR","type":"education","lineage":["https://openalex.org/I24354313"]}],"countries":["AR"],"is_corresponding":false,"raw_author_name":"Leandro J. Arana","raw_affiliation_strings":["FIUBA Universidad de Buenos Aires Facultad de Ingenier\u00eda"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"FIUBA Universidad de Buenos Aires Facultad de Ingenier\u00eda","institution_ids":["https://openalex.org/I24354313"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047025072","display_name":"Luis Seva","orcid":null},"institutions":[{"id":"https://openalex.org/I128590013","display_name":"National Technological University","ror":"https://ror.org/04t730v47","country_code":"AR","type":"education","lineage":["https://openalex.org/I128590013"]}],"countries":["AR"],"is_corresponding":false,"raw_author_name":"Luis Seva","raw_affiliation_strings":["UTN Universidad Tecnol\u00f3gica Nacional Facultad Regional Buenos Aires"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UTN Universidad Tecnol\u00f3gica Nacional Facultad Regional Buenos Aires","institution_ids":["https://openalex.org/I128590013"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015963604","display_name":"Cristian Marchese","orcid":null},"institutions":[{"id":"https://openalex.org/I128590013","display_name":"National Technological University","ror":"https://ror.org/04t730v47","country_code":"AR","type":"education","lineage":["https://openalex.org/I128590013"]}],"countries":["AR"],"is_corresponding":false,"raw_author_name":"Cristian Marchese","raw_affiliation_strings":["UTN Universidad Tecnol\u00f3gica Nacional Facultad Regional Buenos Aires"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UTN Universidad Tecnol\u00f3gica Nacional Facultad Regional Buenos Aires","institution_ids":["https://openalex.org/I128590013"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016126367","display_name":"Leandro Tozzi","orcid":null},"institutions":[{"id":"https://openalex.org/I228664971","display_name":"National University of General San Mart\u00edn","ror":"https://ror.org/00v29jp57","country_code":"AR","type":"education","lineage":["https://openalex.org/I228664971"]}],"countries":["AR"],"is_corresponding":false,"raw_author_name":"Leandro Tozzi","raw_affiliation_strings":["UNSAM Universidad Nacional de San Mart\u00edn Buenos Aires, Argentina"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UNSAM Universidad Nacional de San Mart\u00edn Buenos Aires, Argentina","institution_ids":["https://openalex.org/I228664971"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.3379,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.88178623,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.991599977016449,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6829530000686646},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.6494311690330505},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.6467892527580261},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.6453087329864502},{"id":"https://openalex.org/keywords/python","display_name":"Python (programming language)","score":0.584753155708313},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.5547260642051697},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5386341214179993},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5294484496116638},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.5167273879051208},{"id":"https://openalex.org/keywords/coding","display_name":"Coding (social sciences)","score":0.428743451833725},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.41760221123695374},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.29727548360824585},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2219167947769165},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18500927090644836},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.12815439701080322},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.07505941390991211},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.06962710618972778}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6829530000686646},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.6494311690330505},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.6467892527580261},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.6453087329864502},{"id":"https://openalex.org/C519991488","wikidata":"https://www.wikidata.org/wiki/Q28865","display_name":"Python (programming language)","level":2,"score":0.584753155708313},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.5547260642051697},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5386341214179993},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5294484496116638},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.5167273879051208},{"id":"https://openalex.org/C179518139","wikidata":"https://www.wikidata.org/wiki/Q5140297","display_name":"Coding (social sciences)","level":2,"score":0.428743451833725},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.41760221123695374},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.29727548360824585},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2219167947769165},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18500927090644836},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.12815439701080322},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.07505941390991211},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.06962710618972778},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lascas.2018.8399907","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas.2018.8399907","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE 9th Latin American Symposium on Circuits &amp; Systems (LASCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2108189051","https://openalex.org/W2527549550","https://openalex.org/W2626620868","https://openalex.org/W3143002681","https://openalex.org/W4243164749","https://openalex.org/W6727950341"],"related_works":["https://openalex.org/W2151657833","https://openalex.org/W2031753133","https://openalex.org/W2070693700","https://openalex.org/W1596716095","https://openalex.org/W2577477803","https://openalex.org/W4242619554","https://openalex.org/W2124826473","https://openalex.org/W2156138647","https://openalex.org/W1995592656","https://openalex.org/W2170430628"],"abstract_inverted_index":{"ON":[0],"Semiconductor":[1],"500":[2],"nm":[3],"process":[4],"(ONC5)":[5],"is":[6,23],"a":[7,16,56,81],"well":[8],"establish":[9],"technology":[10],"for":[11,26,69,87,101],"educational":[12,102],"IC":[13,76],"development.":[14,77,89],"However":[15],"full":[17,42],"design":[18,68,100],"flow":[19],"in":[20],"native":[21],"rules":[22],"not":[24],"offered":[25],"Synopsys":[27],"tools.":[28],"This":[29],"paper":[30],"describes":[31],"the":[32,93],"construction":[33],"of":[34,58,83,92,98],"an":[35],"Educational":[36],"Process":[37],"Design":[38],"Kit":[39],"(PDK)":[40],"with":[41],"digital":[43,75],"and":[44,50,67,103],"analog":[45,88],"flow,":[46],"Standard":[47],"cell":[48],"library":[49,57],"Special":[51],"Cells.":[52],"The":[53],"PDK":[54,94],"includes":[55],"100":[59],"characterized":[60],"standard":[61],"cells,":[62],"which":[63],"supports":[64],"clock":[65],"gating":[66],"testability":[70],"techniques":[71],"that":[72],"allow":[73],"fast":[74],"It":[78],"also":[79],"has":[80],"set":[82],"Parametric":[84],"Python":[85],"Cells":[86],"These":[90],"components":[91],"improve":[95],"any":[96],"type":[97],"mixed-signal":[99],"research":[104],"purposes.":[105]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2019,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
