{"id":"https://openalex.org/W2644354034","doi":"https://doi.org/10.1109/lascas.2017.7948093","title":"Low cost rollback to improve fault-tolerance in VLSI circuits","display_name":"Low cost rollback to improve fault-tolerance in VLSI circuits","publication_year":2017,"publication_date":"2017-02-01","ids":{"openalex":"https://openalex.org/W2644354034","doi":"https://doi.org/10.1109/lascas.2017.7948093","mag":"2644354034"},"language":"en","primary_location":{"id":"doi:10.1109/lascas.2017.7948093","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas.2017.7948093","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS)","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026538301","display_name":"Thierry Bonnoit","orcid":"https://orcid.org/0000-0001-5011-1102"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Thierry Bonnoit","raw_affiliation_strings":["CNRS, TIMA, Grenoble, France","Univ. Grenoble Alpes, TIMA, Grenoble, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CNRS, TIMA, Grenoble, France","institution_ids":["https://openalex.org/I4210087012","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"Univ. Grenoble Alpes, TIMA, Grenoble, France","institution_ids":["https://openalex.org/I899635006"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109240766","display_name":"Nacer-Eddine Zergainoh","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Nacer-Eddine Zergainoh","raw_affiliation_strings":["CNRS, TIMA, Grenoble, France","Univ. Grenoble Alpes, TIMA, Grenoble, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CNRS, TIMA, Grenoble, France","institution_ids":["https://openalex.org/I4210087012","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"Univ. Grenoble Alpes, TIMA, Grenoble, France","institution_ids":["https://openalex.org/I899635006"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039513293","display_name":"M. Nicolaidis","orcid":"https://orcid.org/0000-0003-1091-9339"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Michael Nicolaidis","raw_affiliation_strings":["CNRS, TIMA, Grenoble, France","Univ. Grenoble Alpes, TIMA, Grenoble, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CNRS, TIMA, Grenoble, France","institution_ids":["https://openalex.org/I4210087012","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"Univ. Grenoble Alpes, TIMA, Grenoble, France","institution_ids":["https://openalex.org/I899635006"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5018591544","display_name":"Raoul Velazco","orcid":"https://orcid.org/0000-0002-0902-0783"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Raoul Velazco","raw_affiliation_strings":["CNRS, TIMA, Grenoble, France","Univ. Grenoble Alpes, TIMA, Grenoble, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CNRS, TIMA, Grenoble, France","institution_ids":["https://openalex.org/I4210087012","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"Univ. Grenoble Alpes, TIMA, Grenoble, France","institution_ids":["https://openalex.org/I899635006"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2924,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.59091524,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/rollback","display_name":"Rollback","score":0.912226140499115},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6934488415718079},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6534165740013123},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.603147029876709},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.5813632011413574},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.5258128046989441},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5245952010154724},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.494064599275589},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4400119185447693},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.43251392245292664},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.43188929557800293},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.41222304105758667},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3263697624206543},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21338710188865662},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.19377905130386353},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.11088842153549194},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.07831120491027832}],"concepts":[{"id":"https://openalex.org/C174220543","wikidata":"https://www.wikidata.org/wiki/Q395307","display_name":"Rollback","level":3,"score":0.912226140499115},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6934488415718079},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6534165740013123},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.603147029876709},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.5813632011413574},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.5258128046989441},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5245952010154724},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.494064599275589},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4400119185447693},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.43251392245292664},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.43188929557800293},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.41222304105758667},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3263697624206543},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21338710188865662},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.19377905130386353},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.11088842153549194},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.07831120491027832},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C75949130","wikidata":"https://www.wikidata.org/wiki/Q848010","display_name":"Database transaction","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lascas.2017.7948093","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas.2017.7948093","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.41999998688697815,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W148021875","https://openalex.org/W1586112068","https://openalex.org/W1917311714","https://openalex.org/W2015917466","https://openalex.org/W2059729234","https://openalex.org/W2063144194","https://openalex.org/W2073292902","https://openalex.org/W2076602574","https://openalex.org/W2096692505","https://openalex.org/W2113957173","https://openalex.org/W2128303695","https://openalex.org/W2147174930","https://openalex.org/W2152513492","https://openalex.org/W2152652532","https://openalex.org/W4302932299","https://openalex.org/W6678933855"],"related_works":["https://openalex.org/W2072840391","https://openalex.org/W818963952","https://openalex.org/W2157277696","https://openalex.org/W2018106661","https://openalex.org/W1939541994","https://openalex.org/W2039140951","https://openalex.org/W1851795671","https://openalex.org/W2125277664","https://openalex.org/W1591214607","https://openalex.org/W2206615353"],"abstract_inverted_index":{"In":[0,29,86],"nanometer":[1],"technologies,":[2],"circuits":[3],"are":[4,19,53,67],"more":[5,7],"and":[6,16],"sensitive":[8],"to":[9,77],"various":[10],"kinds":[11,103],"of":[12,70,80,99,104],"perturbations.":[13],"Alpha":[14],"particles":[15],"atmospheric":[17],"neutrons":[18],"affecting":[20],"storage":[21],"elements":[22],"as":[23,25,40],"well":[24],"the":[26,30,32,41,50,58,74,97],"combinational":[27],"logic.":[28],"past,":[31],"major":[33],"efforts":[34],"were":[35],"related":[36],"on":[37],"memories.":[38],"However,":[39],"whole":[42],"situation":[43],"is":[44],"getting":[45],"worse,":[46],"solutions":[47],"that":[48,72,95],"protect":[49],"entire":[51],"design":[52],"mandatory.":[54],"Solutions":[55],"for":[56],"detecting":[57],"error":[59],"in":[60,83,101],"logic":[61],"functions":[62],"already":[63],"exist,":[64],"but":[65],"there":[66],"only":[68],"few":[69],"them":[71],"allow":[73],"correction,":[75],"leading":[76],"a":[78,91],"lot":[79],"hardware":[81,93],"overhead":[82],"non-processor":[84],"design.":[85],"this":[87],"paper,":[88],"we":[89],"present":[90],"novel":[92],"architecture":[94],"reduces":[96],"cost":[98],"rollback":[100],"any":[102],"circuit.":[105]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}