{"id":"https://openalex.org/W2676529012","doi":"https://doi.org/10.1109/lascas.2017.7948052","title":"Settling time-based design of a fully differential OTA for a SC integrator","display_name":"Settling time-based design of a fully differential OTA for a SC integrator","publication_year":2017,"publication_date":"2017-02-01","ids":{"openalex":"https://openalex.org/W2676529012","doi":"https://doi.org/10.1109/lascas.2017.7948052","mag":"2676529012"},"language":"en","primary_location":{"id":"doi:10.1109/lascas.2017.7948052","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas.2017.7948052","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 8th Latin American Symposium on Circuits &amp; Systems (LASCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068507532","display_name":"D. Calderon-Preciado","orcid":null},"institutions":[{"id":"https://openalex.org/I68368234","display_name":"Center for Research and Advanced Studies of the National Polytechnic Institute","ror":"https://ror.org/009eqmr18","country_code":"MX","type":"facility","lineage":["https://openalex.org/I59361560","https://openalex.org/I68368234"]}],"countries":["MX"],"is_corresponding":true,"raw_author_name":"D. Calderon-Preciado","raw_affiliation_strings":["Cinvestav-Guadalajara Unit, Zapopan, M\u00e9xico"],"affiliations":[{"raw_affiliation_string":"Cinvestav-Guadalajara Unit, Zapopan, M\u00e9xico","institution_ids":["https://openalex.org/I68368234"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016794649","display_name":"F. Sandoval\u2010Ibarra","orcid":"https://orcid.org/0000-0003-3073-2870"},"institutions":[{"id":"https://openalex.org/I68368234","display_name":"Center for Research and Advanced Studies of the National Polytechnic Institute","ror":"https://ror.org/009eqmr18","country_code":"MX","type":"facility","lineage":["https://openalex.org/I59361560","https://openalex.org/I68368234"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"F. Sandoval-Ibarra","raw_affiliation_strings":["Cinvestav-Guadalajara Unit, Zapopan, M\u00e9xico"],"affiliations":[{"raw_affiliation_string":"Cinvestav-Guadalajara Unit, Zapopan, M\u00e9xico","institution_ids":["https://openalex.org/I68368234"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101812769","display_name":"Fernando Silveira","orcid":"https://orcid.org/0000-0003-1205-8595"},"institutions":[{"id":"https://openalex.org/I180910786","display_name":"Universidad de la Rep\u00fablica","ror":"https://ror.org/030bbe882","country_code":"UY","type":"education","lineage":["https://openalex.org/I180910786"]}],"countries":["UY"],"is_corresponding":false,"raw_author_name":"F. Silveira","raw_affiliation_strings":["Instituto de Ingenier\u00eda El\u00e9ctrica-Universidad Universidad de la Rep\u00fablica, Montevideo, Uruguay"],"affiliations":[{"raw_affiliation_string":"Instituto de Ingenier\u00eda El\u00e9ctrica-Universidad Universidad de la Rep\u00fablica, Montevideo, Uruguay","institution_ids":["https://openalex.org/I180910786"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5068507532"],"corresponding_institution_ids":["https://openalex.org/I68368234"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.07212619,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/settling-time","display_name":"Settling time","score":0.8274229764938354},{"id":"https://openalex.org/keywords/slew-rate","display_name":"Slew rate","score":0.6525768041610718},{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.5795749425888062},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49762728810310364},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.42188113927841187},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.26992470026016235},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.26328057050704956},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1919001042842865},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18082979321479797},{"id":"https://openalex.org/keywords/step-response","display_name":"Step response","score":0.13799655437469482},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11366352438926697},{"id":"https://openalex.org/keywords/control-engineering","display_name":"Control engineering","score":0.1070936918258667}],"concepts":[{"id":"https://openalex.org/C14781684","wikidata":"https://www.wikidata.org/wiki/Q3983320","display_name":"Settling time","level":3,"score":0.8274229764938354},{"id":"https://openalex.org/C82517063","wikidata":"https://www.wikidata.org/wiki/Q1591315","display_name":"Slew rate","level":3,"score":0.6525768041610718},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.5795749425888062},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49762728810310364},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.42188113927841187},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.26992470026016235},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.26328057050704956},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1919001042842865},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18082979321479797},{"id":"https://openalex.org/C160030872","wikidata":"https://www.wikidata.org/wiki/Q2142864","display_name":"Step response","level":2,"score":0.13799655437469482},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11366352438926697},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.1070936918258667},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lascas.2017.7948052","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas.2017.7948052","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 8th Latin American Symposium on Circuits &amp; Systems (LASCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8700000047683716,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W597664373","https://openalex.org/W599650041","https://openalex.org/W1997902048","https://openalex.org/W2099349139","https://openalex.org/W2107638545","https://openalex.org/W2113851294","https://openalex.org/W2146613260","https://openalex.org/W2156707072","https://openalex.org/W2163053851","https://openalex.org/W2163396148","https://openalex.org/W2167034725","https://openalex.org/W2170399350","https://openalex.org/W4232621527"],"related_works":["https://openalex.org/W2163053851","https://openalex.org/W2156707072","https://openalex.org/W101534108","https://openalex.org/W1500249877","https://openalex.org/W2425085424","https://openalex.org/W2122471955","https://openalex.org/W2787909680","https://openalex.org/W2094984178","https://openalex.org/W2546592707","https://openalex.org/W2018492055"],"abstract_inverted_index":{"This":[0],"paper":[1],"optimizes":[2],"the":[3,22,31,43,56,59,66,77,84,87,111,136,171],"design":[4,112,137,146],"of":[5,30,42,65,114,138,162],"an":[6,81,115,127],"OTA":[7,116],"for":[8,51,58,144],"a":[9,15,121,153],"Switched":[10],"Capacitor":[11],"(SC)":[12],"Integrator":[13],"in":[14,117,123,152],"discrete":[16],"time":[17,25,142],"Sigma-Delta":[18,49],"Modulator":[19],"based":[20],"on":[21],"total":[23],"settling":[24,63,78,141],"requirement":[26,57],"and":[27,62,89],"by":[28],"application":[29],"g":[32,98],"<sub":[33,37,99,103],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[34,38,100,104],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">m</sub>":[35,101],"/I":[36,102],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">d</sub>":[39],"method.":[40],"One":[41],"main":[44],"constraints":[45],"when":[46,168],"implementing":[47],"SC":[48],"ADCs":[50],"high":[52],"sampling":[53],"rates":[54],"is":[55,92,107,133],"transition":[60],"frequency":[61],"behavior":[64],"operational":[67],"transconductance":[68],"amplifier.":[69],"Extensive":[70],"analysis":[71],"has":[72],"been":[73],"carried":[74],"out":[75],"concerning":[76],"time,":[79],"however":[80],"optimum":[82,128,172],"regarding":[83],"distribution":[85,151],"between":[86],"slew":[88],"linear":[90],"periods":[91],"yet":[93],"to":[94,109,119,164,170],"be":[95],"defined.":[96],"The":[97,131],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">D</sub>":[105],"method":[106,132],"used":[108],"sweep":[110],"space":[113],"order":[118],"find":[120],"minimum":[122],"power":[124],"consumption":[125,160],"thus":[126],"slew/linear":[129,150],"distribution.":[130],"validated":[134],"through":[135],"three":[139],"2.5ns":[140],"OTAs":[143],"two":[145],"scenarios":[147],"with":[148],"different":[149],"130nm":[154],"CMOS":[155],"process.":[156],"Results":[157],"show":[158],"that":[159],"savings":[161],"up":[163],"60%":[165],"are":[166],"achieved":[167],"compared":[169],"design.":[173]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
