{"id":"https://openalex.org/W2142764951","doi":"https://doi.org/10.1109/lascas.2013.6519092","title":"Signal integrity design of TSV and interposer in 3D-IC","display_name":"Signal integrity design of TSV and interposer in 3D-IC","publication_year":2013,"publication_date":"2013-02-01","ids":{"openalex":"https://openalex.org/W2142764951","doi":"https://doi.org/10.1109/lascas.2013.6519092","mag":"2142764951"},"language":"en","primary_location":{"id":"doi:10.1109/lascas.2013.6519092","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas.2013.6519092","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074429007","display_name":"Jonghyun Cho","orcid":"https://orcid.org/0000-0003-3277-1072"},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jonghyun Cho","raw_affiliation_strings":["Department of Electrical Engineering, KAIST, Daejeon, South Korea","Dept. of Electr. Eng., KAIST\\\\, Daejeon, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, KAIST, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]},{"raw_affiliation_string":"Dept. of Electr. Eng., KAIST\\\\, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046623632","display_name":"Joungho Kim","orcid":"https://orcid.org/0000-0003-1376-0781"},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Joungho Kim","raw_affiliation_strings":["Department of Electrical Engineering, KAIST, Daejeon, South Korea","Dept. of Electr. Eng., KAIST\\\\, Daejeon, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, KAIST, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]},{"raw_affiliation_string":"Dept. of Electr. Eng., KAIST\\\\, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I157485424"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10623","display_name":"Thin-Film Transistor Technologies","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interposer","display_name":"Interposer","score":0.953471302986145},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.8721234798431396},{"id":"https://openalex.org/keywords/through-silicon-via","display_name":"Through-silicon via","score":0.7775696516036987},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.6153768301010132},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.5749304294586182},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5700410604476929},{"id":"https://openalex.org/keywords/back-end-of-line","display_name":"Back end of line","score":0.5133287310600281},{"id":"https://openalex.org/keywords/power-integrity","display_name":"Power integrity","score":0.4944591522216797},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.4683650732040405},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.45748037099838257},{"id":"https://openalex.org/keywords/line","display_name":"Line (geometry)","score":0.43339356780052185},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3738858699798584},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.33847182989120483},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.28647053241729736},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2518188953399658},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.2354956865310669},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23492255806922913},{"id":"https://openalex.org/keywords/printed-circuit-board","display_name":"Printed circuit board","score":0.22027543187141418},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.10914796590805054},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.056997835636138916}],"concepts":[{"id":"https://openalex.org/C158802814","wikidata":"https://www.wikidata.org/wiki/Q6056418","display_name":"Interposer","level":4,"score":0.953471302986145},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.8721234798431396},{"id":"https://openalex.org/C45632049","wikidata":"https://www.wikidata.org/wiki/Q1578120","display_name":"Through-silicon via","level":3,"score":0.7775696516036987},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.6153768301010132},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.5749304294586182},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5700410604476929},{"id":"https://openalex.org/C2776628375","wikidata":"https://www.wikidata.org/wiki/Q4839229","display_name":"Back end of line","level":3,"score":0.5133287310600281},{"id":"https://openalex.org/C2777561913","wikidata":"https://www.wikidata.org/wiki/Q19599527","display_name":"Power integrity","level":4,"score":0.4944591522216797},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.4683650732040405},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.45748037099838257},{"id":"https://openalex.org/C198352243","wikidata":"https://www.wikidata.org/wiki/Q37105","display_name":"Line (geometry)","level":2,"score":0.43339356780052185},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3738858699798584},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.33847182989120483},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.28647053241729736},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2518188953399658},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.2354956865310669},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23492255806922913},{"id":"https://openalex.org/C120793396","wikidata":"https://www.wikidata.org/wiki/Q173350","display_name":"Printed circuit board","level":2,"score":0.22027543187141418},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.10914796590805054},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.056997835636138916},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C100460472","wikidata":"https://www.wikidata.org/wiki/Q2368605","display_name":"Etching (microfabrication)","level":3,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C133386390","wikidata":"https://www.wikidata.org/wiki/Q184996","display_name":"Dielectric","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lascas.2013.6519092","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas.2013.6519092","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2001870828","https://openalex.org/W2038930477","https://openalex.org/W2054298969","https://openalex.org/W2084574629","https://openalex.org/W2167539582"],"related_works":["https://openalex.org/W1990828594","https://openalex.org/W2011182927","https://openalex.org/W2310189477","https://openalex.org/W2333804548","https://openalex.org/W2543304869","https://openalex.org/W2019002696","https://openalex.org/W2072269247","https://openalex.org/W2047315796","https://openalex.org/W2002219888","https://openalex.org/W2142764951"],"abstract_inverted_index":{"Electrical":[0],"characterization":[1],"of":[2],"through-silicon":[3],"via":[4],"(TSV)":[5],"and":[6,26,43,80],"interposer":[7,59,81],"line":[8,60,82],"becomes":[9],"more":[10],"important":[11],"as":[12],"3-dimensional":[13],"integrated":[14],"circuit":[15],"(3D-IC)":[16],"is":[17,24,56],"emerging.":[18],"In":[19],"this":[20],"paper,":[21],"TSV":[22,50,79],"modeling":[23],"proposed":[25],"verified":[27],"using":[28],"3D-EM":[29],"simulation.":[30],"The":[31],"model":[32],"has":[33],"good":[34],"correlation":[35],"with":[36],"the":[37,49,78],"simulation":[38],"both":[39,64],"at":[40,65],"insertion":[41],"loss":[42],"TSV-to-TSV":[44],"noise":[45],"transfer":[46],"function.":[47],"Using":[48],"model,":[51],"signal":[52],"integrity":[53],"(SI)":[54],"analysis":[55],"performed.":[57],"Also,":[58],"characteristics":[61],"are":[62],"analyzed":[63],"frequency-and":[66],"time-":[67],"domain.":[68],"As":[69],"a":[70],"result,":[71],"SI":[72],"can":[73],"be":[74],"considered":[75],"based":[76],"on":[77],"analyses":[83],"for":[84],"3D":[85],"IC":[86],"design.":[87]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2016,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}