{"id":"https://openalex.org/W2071756636","doi":"https://doi.org/10.1109/lascas.2013.6518990","title":"A scalable parallel reconfigurable hardware architecture for DNA matching","display_name":"A scalable parallel reconfigurable hardware architecture for DNA matching","publication_year":2013,"publication_date":"2013-02-01","ids":{"openalex":"https://openalex.org/W2071756636","doi":"https://doi.org/10.1109/lascas.2013.6518990","mag":"2071756636"},"language":"en","primary_location":{"id":"doi:10.1109/lascas.2013.6518990","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas.2013.6518990","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041349437","display_name":"E. Segundo","orcid":null},"institutions":[{"id":"https://openalex.org/I40034438","display_name":"Universidade do Estado do Rio de Janeiro","ror":"https://ror.org/0198v2949","country_code":"BR","type":"education","lineage":["https://openalex.org/I40034438"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"E. J. N. Segundo","raw_affiliation_strings":["Dept. Electronics Eng. and Telec., State University of Rio de Janeiro, Brazil","Dept. Electron. Eng. & Telec., State Univ. of Rio de Janeiro, Rio de Janeiro, Brazil"],"affiliations":[{"raw_affiliation_string":"Dept. Electronics Eng. and Telec., State University of Rio de Janeiro, Brazil","institution_ids":["https://openalex.org/I40034438"]},{"raw_affiliation_string":"Dept. Electron. Eng. & Telec., State Univ. of Rio de Janeiro, Rio de Janeiro, Brazil","institution_ids":["https://openalex.org/I40034438"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084920912","display_name":"Nadia Nedjah","orcid":"https://orcid.org/0000-0002-1656-6397"},"institutions":[{"id":"https://openalex.org/I40034438","display_name":"Universidade do Estado do Rio de Janeiro","ror":"https://ror.org/0198v2949","country_code":"BR","type":"education","lineage":["https://openalex.org/I40034438"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"N. Nedjah","raw_affiliation_strings":["Dept. Electronics Eng. and Telec., State University of Rio de Janeiro, Brazil","Dept. Electron. Eng. & Telec., State Univ. of Rio de Janeiro, Rio de Janeiro, Brazil"],"affiliations":[{"raw_affiliation_string":"Dept. Electronics Eng. and Telec., State University of Rio de Janeiro, Brazil","institution_ids":["https://openalex.org/I40034438"]},{"raw_affiliation_string":"Dept. Electron. Eng. & Telec., State Univ. of Rio de Janeiro, Rio de Janeiro, Brazil","institution_ids":["https://openalex.org/I40034438"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048916912","display_name":"Luiza de Macedo Mourelle","orcid":"https://orcid.org/0000-0002-4680-2047"},"institutions":[{"id":"https://openalex.org/I40034438","display_name":"Universidade do Estado do Rio de Janeiro","ror":"https://ror.org/0198v2949","country_code":"BR","type":"education","lineage":["https://openalex.org/I40034438"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"L. de Macedo Mourelle","raw_affiliation_strings":["Dept. Systems Eng. and Computation, State University of Rio de Janeiro, Brazil","Dept. Syst. Eng. & Comput., State Univ. of Rio de Janeiro, Rio de Janeiro, Brazil"],"affiliations":[{"raw_affiliation_string":"Dept. Systems Eng. and Computation, State University of Rio de Janeiro, Brazil","institution_ids":["https://openalex.org/I40034438"]},{"raw_affiliation_string":"Dept. Syst. Eng. & Comput., State Univ. of Rio de Janeiro, Rio de Janeiro, Brazil","institution_ids":["https://openalex.org/I40034438"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5041349437"],"corresponding_institution_ids":["https://openalex.org/I40034438"],"apc_list":null,"apc_paid":null,"fwci":0.4809,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.76253161,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"7017","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.9948999881744385,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7569303512573242},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.7091776728630066},{"id":"https://openalex.org/keywords/matching","display_name":"Matching (statistics)","score":0.6174603700637817},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5945406556129456},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.543133556842804},{"id":"https://openalex.org/keywords/fragment","display_name":"Fragment (logic)","score":0.4501042068004608},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.35982733964920044},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.29663515090942383},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10426783561706543},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.08498349785804749}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7569303512573242},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7091776728630066},{"id":"https://openalex.org/C165064840","wikidata":"https://www.wikidata.org/wiki/Q1321061","display_name":"Matching (statistics)","level":2,"score":0.6174603700637817},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5945406556129456},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.543133556842804},{"id":"https://openalex.org/C2776235265","wikidata":"https://www.wikidata.org/wiki/Q18392052","display_name":"Fragment (logic)","level":2,"score":0.4501042068004608},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35982733964920044},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.29663515090942383},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10426783561706543},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.08498349785804749},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lascas.2013.6518990","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas.2013.6518990","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Peace, Justice and strong institutions","id":"https://metadata.un.org/sdg/16","score":0.6200000047683716}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1600463518","https://openalex.org/W1981432395","https://openalex.org/W2074231493","https://openalex.org/W2089499735","https://openalex.org/W2099748572","https://openalex.org/W2125677665","https://openalex.org/W2158627511","https://openalex.org/W2266689359","https://openalex.org/W4236236547"],"related_works":["https://openalex.org/W1973480752","https://openalex.org/W2805502594","https://openalex.org/W4253208712","https://openalex.org/W31439402","https://openalex.org/W3132641048","https://openalex.org/W2217679042","https://openalex.org/W1603677234","https://openalex.org/W2525971763","https://openalex.org/W2984753899","https://openalex.org/W2783178962"],"abstract_inverted_index":{"DNA":[0,15,25,28,58,76,105],"sequence":[1],"matching":[2,57,77],"is":[3,60,88],"used":[4,112],"in":[5,115],"the":[6,80,83,101,108,125],"identification":[7],"of":[8,14,21,24,54,82,100,110,124],"a":[9,12,22,32,37,41,46,49,61,70],"relationship":[10],"between":[11,137],"fragment":[13,29],"and":[16,56,103,131,139],"its":[17,92],"owner":[18],"by":[19,40,45],"mean":[20],"database":[23],"registers.":[26],"A":[27],"could":[30],"be":[31,95,119],"hair":[33],"sample":[34],"left":[35],"at":[36],"crime":[38],"scene":[39],"suspect":[42],"or":[43],"provided":[44],"person":[47],"for":[48,75],"paternity":[50],"exam.":[51],"The":[52,86,127,135],"process":[53],"aligning":[55],"sequences":[59],"computationally":[62],"demanding":[63],"process.":[64],"In":[65],"this":[66],"paper,":[67],"we":[68],"propose":[69],"novel":[71],"parallel":[72,116],"hardware":[73],"architecture":[74],"based":[78],"on":[79,98],"steps":[81],"BLAST":[84],"algorithm.":[85,126],"design":[87,128,146],"scalable":[89],"so":[90],"that":[91],"structure":[93],"can":[94,117],"adjusted":[96],"depending":[97,121],"size":[99],"subject":[102],"query":[104],"sequences.":[106],"Moreover,":[107],"number":[109],"units":[111],"to":[113,143],"perform":[114],"also":[118],"scaled":[120],"some":[122],"characteristics":[123],"was":[129],"synthesized":[130],"programmed":[132],"into":[133],"FPGA.":[134],"trade-off":[136],"cost":[138],"performance":[140],"were":[141],"analyzed":[142],"evaluate":[144],"different":[145],"configuration.":[147]},"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}