{"id":"https://openalex.org/W1999605159","doi":"https://doi.org/10.1109/lascas.2013.6518986","title":"A fast hardware-friendly motion estimation algorithm and its VLSI design for real time ultra high definition applications","display_name":"A fast hardware-friendly motion estimation algorithm and its VLSI design for real time ultra high definition applications","publication_year":2013,"publication_date":"2013-02-01","ids":{"openalex":"https://openalex.org/W1999605159","doi":"https://doi.org/10.1109/lascas.2013.6518986","mag":"1999605159"},"language":"en","primary_location":{"id":"doi:10.1109/lascas.2013.6518986","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas.2013.6518986","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065080078","display_name":"Gustavo Sanchez","orcid":"https://orcid.org/0000-0002-8399-3014"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"G. Sanchez","raw_affiliation_strings":["Group of Architectures and Integrated Circuits, Federal University of Pelotas, Pelotas, Brazil","Group of Archit. & Integrated Circuits, Fed. Univ. of Pelotas, Pelotas, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Group of Architectures and Integrated Circuits, Federal University of Pelotas, Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]},{"raw_affiliation_string":"Group of Archit. & Integrated Circuits, Fed. Univ. of Pelotas, Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081630912","display_name":"Marcelo Porto","orcid":"https://orcid.org/0000-0003-3827-3023"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"M. Porto","raw_affiliation_strings":["Group of Architectures and Integrated Circuits, Federal University of Pelotas, Pelotas, Brazil","Group of Archit. & Integrated Circuits, Fed. Univ. of Pelotas, Pelotas, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Group of Architectures and Integrated Circuits, Federal University of Pelotas, Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]},{"raw_affiliation_string":"Group of Archit. & Integrated Circuits, Fed. Univ. of Pelotas, Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070735330","display_name":"Luciano Agostini","orcid":"https://orcid.org/0000-0002-3421-5830"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"L. Agostini","raw_affiliation_strings":["Group of Architectures and Integrated Circuits, Federal University of Pelotas, Pelotas, Brazil","Group of Archit. & Integrated Circuits, Fed. Univ. of Pelotas, Pelotas, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Group of Architectures and Integrated Circuits, Federal University of Pelotas, Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]},{"raw_affiliation_string":"Group of Archit. & Integrated Circuits, Fed. Univ. of Pelotas, Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I169248161"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/stratix","display_name":"Stratix","score":0.7846291065216064},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7488288283348083},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6898198127746582},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.661220371723175},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.6318492293357849},{"id":"https://openalex.org/keywords/hardware-architecture","display_name":"Hardware architecture","score":0.5383359789848328},{"id":"https://openalex.org/keywords/motion-estimation","display_name":"Motion estimation","score":0.5150320529937744},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.46187353134155273},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.41380423307418823},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.37915724515914917},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.28693294525146484},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2695275843143463}],"concepts":[{"id":"https://openalex.org/C2776277307","wikidata":"https://www.wikidata.org/wiki/Q22074755","display_name":"Stratix","level":3,"score":0.7846291065216064},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7488288283348083},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6898198127746582},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.661220371723175},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.6318492293357849},{"id":"https://openalex.org/C65232700","wikidata":"https://www.wikidata.org/wiki/Q5656403","display_name":"Hardware architecture","level":3,"score":0.5383359789848328},{"id":"https://openalex.org/C10161872","wikidata":"https://www.wikidata.org/wiki/Q557891","display_name":"Motion estimation","level":2,"score":0.5150320529937744},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.46187353134155273},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.41380423307418823},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37915724515914917},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.28693294525146484},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2695275843143463},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lascas.2013.6518986","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas.2013.6518986","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.5400000214576721}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1997919482","https://openalex.org/W2039181402","https://openalex.org/W2128555948","https://openalex.org/W2132145443","https://openalex.org/W2163026076","https://openalex.org/W2167328457","https://openalex.org/W2425240487","https://openalex.org/W4254968059"],"related_works":["https://openalex.org/W2109992022","https://openalex.org/W1527010816","https://openalex.org/W2131842997","https://openalex.org/W3189556868","https://openalex.org/W2066978430","https://openalex.org/W2088640786","https://openalex.org/W2053048395","https://openalex.org/W2294402907","https://openalex.org/W1567247758","https://openalex.org/W2108275671"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"the":[3,65,87,100,112,124,131,135,139,171],"Low":[4],"Density":[5],"and":[6,13,46,63,159,189],"Iterative":[7],"Search":[8,89],"(LD&IS)":[9],"motion":[10],"estimation":[11],"algorithm,":[12,133],"it":[14],"hardware":[15,116,190],"design":[16],"for":[17,69,115,150,161],"real":[18,147,181],"time":[19,148,182],"ultra":[20],"high":[21,70,91],"definition":[22,71],"applications":[23],"are":[24,119],"presented.":[25],"The":[26,73,94,141,153],"LD&IS":[27,74,95,132,142,172],"is":[28,174],"a":[29,41,47,184],"fast":[30],"hardware-friendly":[31],"algorithm":[32,90,114],"that":[33,170],"can":[34],"be":[35,109],"divided":[36],"into":[37],"two":[38],"main":[39],"steps:":[40],"low":[42,125],"density":[43,126],"multipoint":[44,127],"search":[45,128],"central":[48],"iterative":[49],"evaluation.":[50],"This":[51],"combination":[52],"provides":[53],"an":[54,77,97,162],"efficient":[55],"way":[56],"to":[57,86,111,176],"evade":[58],"from":[59],"local":[60],"minima":[61],"falls":[62],"increasing":[64,98],"image":[66],"quality,":[67],"especially":[68],"videos.":[72,93,152],"reached":[75],"HD":[76],"average":[78],"PSNR":[79],"gain":[80],"of":[81,102,130,138],"1.40":[82],"dB":[83],"when":[84],"compared":[85,103],"Diamond":[88],"resolution":[92],"presents":[96],"in":[99,157,180],"number":[101],"blocks,":[104],"however,":[105],"its":[106],"performance":[107],"could":[108],"similar":[110],"DS":[113],"implementation.":[117],"There":[118],"no":[120],"data":[121],"dependences":[122],"at":[123],"step":[129],"allowing":[134],"free":[136],"exploration":[137],"parallelism.":[140],"architecture":[143,154,173],"was":[144,155],"designed":[145],"targeting":[146],"processing":[149],"QFHD":[151,178],"described":[156],"VHDL":[158],"synthesized":[160],"Altera":[163],"Stratix":[164],"4":[165],"FPGA.":[166],"Synthesis":[167],"results":[168],"show":[169],"capable":[175],"process":[177],"videos":[179],"with":[183],"good":[185],"trade-off":[186],"between":[187],"quality":[188],"resources":[191],"utilization.":[192]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}