{"id":"https://openalex.org/W7125613733","doi":"https://doi.org/10.1109/jssc.2026.3654029","title":"A 7-bit 150-GSa/s DAC in 5-nm FinFET CMOS","display_name":"A 7-bit 150-GSa/s DAC in 5-nm FinFET CMOS","publication_year":2026,"publication_date":"2026-01-22","ids":{"openalex":"https://openalex.org/W7125613733","doi":"https://doi.org/10.1109/jssc.2026.3654029"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2026.3654029","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2026.3654029","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://hdl.handle.net/1854/LU-01KGFGX1QHA31ED9WQ96XJF7C5","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030816419","display_name":"Bart Moeneclaey","orcid":"https://orcid.org/0000-0002-9444-6235"},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Bart Moeneclaey","raw_affiliation_strings":["Department of Information Technology, IDLab, Ghent University–imec, Ghent, Belgium"],"raw_orcid":"https://orcid.org/0000-0002-9444-6235","affiliations":[{"raw_affiliation_string":"Department of Information Technology, IDLab, Ghent University–imec, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038700186","display_name":"Joris Lambrecht","orcid":"https://orcid.org/0000-0001-8291-0339"},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Joris Lambrecht","raw_affiliation_strings":["Department of Information Technology, IDLab, Ghent University–imec, Ghent, Belgium"],"raw_orcid":"https://orcid.org/0000-0001-8291-0339","affiliations":[{"raw_affiliation_string":"Department of Information Technology, IDLab, Ghent University–imec, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036699269","display_name":"Angelo Parisi","orcid":"https://orcid.org/0000-0003-1397-9011"},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Angelo Parisi","raw_affiliation_strings":["imec, Leuven, Belgium"],"raw_orcid":"https://orcid.org/0000-0003-1397-9011","affiliations":[{"raw_affiliation_string":"imec, Leuven, Belgium","institution_ids":["https://openalex.org/I4210114974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5123765939","display_name":"Joris Van Kerrebrouck","orcid":null},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Joris Van Kerrebrouck","raw_affiliation_strings":["Department of Information Technology, IDLab, Ghent University–imec, Ghent, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Information Technology, IDLab, Ghent University–imec, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041397924","display_name":"Gertjan Coudyzer","orcid":"https://orcid.org/0000-0002-3915-394X"},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Gertjan Coudyzer","raw_affiliation_strings":["Department of Information Technology, IDLab, Ghent University–imec, Ghent, Belgium"],"raw_orcid":"https://orcid.org/0000-0002-3915-394X","affiliations":[{"raw_affiliation_string":"Department of Information Technology, IDLab, Ghent University–imec, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084127300","display_name":"Anirudh Kankuppe","orcid":"https://orcid.org/0000-0002-0114-1193"},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Anirudh Kankuppe","raw_affiliation_strings":["imec, Leuven, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"imec, Leuven, Belgium","institution_ids":["https://openalex.org/I4210114974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103424967","display_name":"Xin Yu Yin","orcid":null},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Xin Yin","raw_affiliation_strings":["Department of Information Technology, IDLab, Ghent University–imec, Ghent, Belgium"],"raw_orcid":"https://orcid.org/0000-0002-9672-6652","affiliations":[{"raw_affiliation_string":"Department of Information Technology, IDLab, Ghent University–imec, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013611541","display_name":"Ewout Martens","orcid":"https://orcid.org/0000-0001-5485-1837"},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Ewout Martens","raw_affiliation_strings":["imec, Leuven, Belgium"],"raw_orcid":"https://orcid.org/0000-0001-5485-1837","affiliations":[{"raw_affiliation_string":"imec, Leuven, Belgium","institution_ids":["https://openalex.org/I4210114974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051801273","display_name":"J. Craninckx","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Jan Craninckx","raw_affiliation_strings":["imec, Leuven, Belgium"],"raw_orcid":"https://orcid.org/0000-0002-3980-0203","affiliations":[{"raw_affiliation_string":"imec, Leuven, Belgium","institution_ids":["https://openalex.org/I4210114974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090969794","display_name":"Peter Ossieur","orcid":"https://orcid.org/0000-0002-8737-9142"},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Peter Ossieur","raw_affiliation_strings":["Department of Information Technology, IDLab, Ghent University–imec, Ghent, Belgium"],"raw_orcid":"https://orcid.org/0000-0002-8737-9142","affiliations":[{"raw_affiliation_string":"Department of Information Technology, IDLab, Ghent University–imec, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":10,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0919786,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"61","issue":"4","first_page":"1363","last_page":"1373"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.3968999981880188,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.3968999981880188,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.3853999972343445,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.13750000298023224,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.8238999843597412},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5917999744415283},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.5065000057220459},{"id":"https://openalex.org/keywords/wireline","display_name":"Wireline","score":0.4999000132083893},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.42500001192092896},{"id":"https://openalex.org/keywords/pulse-generator","display_name":"Pulse generator","score":0.4235999882221222},{"id":"https://openalex.org/keywords/inductor","display_name":"Inductor","score":0.4154999852180481},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.4000999927520752}],"concepts":[{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.8238999843597412},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5917999744415283},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.5065000057220459},{"id":"https://openalex.org/C2776951270","wikidata":"https://www.wikidata.org/wiki/Q8026910","display_name":"Wireline","level":3,"score":0.4999000132083893},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4652000069618225},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.43880000710487366},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.42500001192092896},{"id":"https://openalex.org/C51319974","wikidata":"https://www.wikidata.org/wiki/Q3509564","display_name":"Pulse generator","level":3,"score":0.4235999882221222},{"id":"https://openalex.org/C144534570","wikidata":"https://www.wikidata.org/wiki/Q5325","display_name":"Inductor","level":3,"score":0.4154999852180481},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.4000999927520752},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.39969998598098755},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3425000011920929},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3264000117778778},{"id":"https://openalex.org/C38858127","wikidata":"https://www.wikidata.org/wiki/Q5441228","display_name":"Feed forward","level":2,"score":0.3070000112056732},{"id":"https://openalex.org/C125576049","wikidata":"https://www.wikidata.org/wiki/Q2246273","display_name":"CPU multiplier","level":5,"score":0.3012000024318695},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2906999886035919},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2867000102996826},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.28299999237060547},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.26980000734329224},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.26510000228881836},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.2612999975681305},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.2596000134944916},{"id":"https://openalex.org/C192082776","wikidata":"https://www.wikidata.org/wiki/Q7663751","display_name":"System time","level":3,"score":0.2587999999523163},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.25850000977516174},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.25760000944137573},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.25119999051094055}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/jssc.2026.3654029","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2026.3654029","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},{"id":"pmh:oai:archive.ugent.be:01KGFGX1QHA31ED9WQ96XJF7C5","is_oa":true,"landing_page_url":"http://hdl.handle.net/1854/LU-01KGFGX1QHA31ED9WQ96XJF7C5","pdf_url":null,"source":{"id":"https://openalex.org/S4306400478","display_name":"Ghent University Academic Bibliography (Ghent University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I32597200","host_organization_name":"Ghent University","host_organization_lineage":["https://openalex.org/I32597200"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN: 1558-173X","raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":{"id":"pmh:oai:archive.ugent.be:01KGFGX1QHA31ED9WQ96XJF7C5","is_oa":true,"landing_page_url":"http://hdl.handle.net/1854/LU-01KGFGX1QHA31ED9WQ96XJF7C5","pdf_url":null,"source":{"id":"https://openalex.org/S4306400478","display_name":"Ghent University Academic Bibliography (Ghent University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I32597200","host_organization_name":"Ghent University","host_organization_lineage":["https://openalex.org/I32597200"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN: 1558-173X","raw_type":"info:eu-repo/semantics/publishedVersion"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.907528281211853,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"We":[0],"present":[1],"a":[2,54,104,112,129],"7-bit":[3],"wireline":[4],"digital-to-analog":[5],"converter":[6],"(DAC),":[7],"fabricated":[8],"in":[9,20],"5-nm":[10],"FinFET":[11],"CMOS.":[12],"The":[13,73,107],"number":[14,93],"of":[15,94,119],"source-series":[16],"terminated":[17],"(SST)":[18],"cells":[19,30,78],"the":[21,61,66,91],"output":[22],"stage":[23],"is":[24],"reduced":[25],"to":[26,82,99],"34":[27],"by":[28],"employing":[29],"with":[31,48],"relative":[32],"weight":[33],"1":[34],"and":[35,53,86,114,123],"4.":[36],"Each":[37],"differential":[38],"cell":[39],"integrates":[40],"two":[41],"single-ended":[42],"three-stage":[43],"8:1":[44],"return-to-zero":[45],"(RZ)":[46],"multiplexers":[47,67],"an":[49,69],"integrated":[50],"SST":[51],"driver":[52],"clock":[55,63,74],"pulse":[56],"generator":[57],"(CPG),":[58],"which":[59],"generates":[60],"required":[62],"pulses":[64],"for":[65,103],"from":[68,111],"eight-phase":[70],"clocking":[71],"scheme.":[72],"buffers":[75],"driving":[76],"these":[77],"feature":[79],"shunt":[80],"inductors":[81],"reduce":[83],"power":[84],"consumption":[85],"jitter.":[87],"At":[88],"150":[89],"GSa/s,":[90],"effective":[92],"bits":[95],"(ENOB)":[96],"was":[97],"measured":[98],"be":[100],"4.1":[101],"b":[102],"72.8-GHz":[105],"sinewave.":[106],"DAC":[108],"consumes":[109],"621mW":[110],"0.9-":[113],"0.96-V":[115],"supply.":[116],"Eye":[117],"diagrams":[118],"150-GBd":[120],"NRZ,":[121],"PAM-4,":[122],"PAM-6":[124],"are":[125],"demonstrated,":[126],"pre-equalized":[127],"using":[128],"10-tap":[130],"feedforward":[131],"equalizer.":[132]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2026-01-25T00:00:00"}