{"id":"https://openalex.org/W7116942917","doi":"https://doi.org/10.1109/jssc.2025.3640957","title":"A 24.5\u201345.2-GHz Low-Jitter Compact Differentially Injection-Locked Clock Multiplier With Folded-Inductor-Based Magnetic-Flux Cancellation","display_name":"A 24.5\u201345.2-GHz Low-Jitter Compact Differentially Injection-Locked Clock Multiplier With Folded-Inductor-Based Magnetic-Flux Cancellation","publication_year":2025,"publication_date":"2025-12-23","ids":{"openalex":"https://openalex.org/W7116942917","doi":"https://doi.org/10.1109/jssc.2025.3640957"},"language":null,"primary_location":{"id":"doi:10.1109/jssc.2025.3640957","is_oa":true,"landing_page_url":"https://doi.org/10.1109/jssc.2025.3640957","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://doi.org/10.1109/jssc.2025.3640957","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5012134567","display_name":"Feifan Hong","orcid":"https://orcid.org/0000-0001-7461-1945"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Feifan Hong","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland"],"raw_orcid":"https://orcid.org/0000-0001-7461-1945","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland","institution_ids":["https://openalex.org/I100930933"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004729728","display_name":"J. Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Jiawen Chen","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland"],"raw_orcid":"https://orcid.org/0009-0002-0451-2401","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland","institution_ids":["https://openalex.org/I100930933"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070858334","display_name":"Pingda Guan","orcid":"https://orcid.org/0000-0002-9296-3300"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Pingda Guan","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland"],"raw_orcid":"https://orcid.org/0000-0002-9296-3300","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland","institution_ids":["https://openalex.org/I100930933"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111272095","display_name":"Sayan Kumar","orcid":"https://orcid.org/0009-0004-7895-9534"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Sayan Kumar","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland"],"raw_orcid":"https://orcid.org/0009-0004-7895-9534","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland","institution_ids":["https://openalex.org/I100930933"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027017637","display_name":"Robert Bogdan Staszewski","orcid":"https://orcid.org/0000-0001-9848-1129"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Robert Bogdan Staszewski","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland"],"raw_orcid":"https://orcid.org/0000-0001-9848-1129","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland","institution_ids":["https://openalex.org/I100930933"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050565374","display_name":"Teerachot Siriburanon","orcid":"https://orcid.org/0000-0003-1658-9596"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Teerachot Siriburanon","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland"],"raw_orcid":"https://orcid.org/0000-0003-1658-9596","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland","institution_ids":["https://openalex.org/I100930933"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.5015363,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"61","issue":"4","first_page":"1410","last_page":"1424"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.8064000010490417,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.8064000010490417,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.17509999871253967,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.004800000227987766,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.6279000043869019},{"id":"https://openalex.org/keywords/frequency-multiplier","display_name":"Frequency multiplier","score":0.5817999839782715},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.5631999969482422},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.5256999731063843},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4896000027656555},{"id":"https://openalex.org/keywords/ring-oscillator","display_name":"Ring oscillator","score":0.4115000069141388},{"id":"https://openalex.org/keywords/cpu-multiplier","display_name":"CPU multiplier","score":0.3653999865055084},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.33799999952316284}],"concepts":[{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.6279000043869019},{"id":"https://openalex.org/C146002875","wikidata":"https://www.wikidata.org/wiki/Q1074289","display_name":"Frequency multiplier","level":3,"score":0.5817999839782715},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.5631999969482422},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.5256999731063843},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.49729999899864197},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4896000027656555},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.45350000262260437},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4142000079154968},{"id":"https://openalex.org/C104111718","wikidata":"https://www.wikidata.org/wiki/Q2153973","display_name":"Ring oscillator","level":3,"score":0.4115000069141388},{"id":"https://openalex.org/C125576049","wikidata":"https://www.wikidata.org/wiki/Q2246273","display_name":"CPU multiplier","level":5,"score":0.3653999865055084},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.33799999952316284},{"id":"https://openalex.org/C186886427","wikidata":"https://www.wikidata.org/wiki/Q5441213","display_name":"Feedback loop","level":2,"score":0.3301999866962433},{"id":"https://openalex.org/C62869609","wikidata":"https://www.wikidata.org/wiki/Q28137","display_name":"Quadrature (astronomy)","level":2,"score":0.322299987077713},{"id":"https://openalex.org/C203597036","wikidata":"https://www.wikidata.org/wiki/Q1238887","display_name":"Local oscillator","level":3,"score":0.3215000033378601},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.31150001287460327},{"id":"https://openalex.org/C101476363","wikidata":"https://www.wikidata.org/wiki/Q3798800","display_name":"Injection locking","level":3,"score":0.31119999289512634},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.296999990940094},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.27090001106262207},{"id":"https://openalex.org/C110086884","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase detector","level":3,"score":0.2662000060081482},{"id":"https://openalex.org/C26907483","wikidata":"https://www.wikidata.org/wiki/Q5253479","display_name":"Delay line oscillator","level":4,"score":0.26510000228881836},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.26339998841285706}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2025.3640957","is_oa":true,"landing_page_url":"https://doi.org/10.1109/jssc.2025.3640957","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1109/jssc.2025.3640957","is_oa":true,"landing_page_url":"https://doi.org/10.1109/jssc.2025.3640957","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G6907689094","display_name":null,"funder_award_id":"21/RP-2TF/10019","funder_id":"https://openalex.org/F4320320847","funder_display_name":"Science Foundation Ireland"},{"id":"https://openalex.org/G8219044472","display_name":null,"funder_award_id":"20/FFP-P/8437","funder_id":"https://openalex.org/F4320320847","funder_display_name":"Science Foundation Ireland"}],"funders":[{"id":"https://openalex.org/F4320320847","display_name":"Science Foundation Ireland","ror":"https://ror.org/0271asj38"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"In":[0],"this":[1],"article,":[2],"we":[3],"present":[4],"a":[5,23,57,83],"differentially":[6],"injection-locked":[7],"clock":[8],"multiplier":[9],"(ILCM)":[10],"featuring":[11],"an":[12,62,108],"ultrawide":[13],"frequency":[14,41],"tuning":[15],"range":[16],"(TR)":[17],"and":[18,39],"low":[19],"jitter,":[20],"achieved":[21],"through":[22],"compact":[24,97],"folded-inductor-based":[25],"magnetic-flux":[26],"cancellation":[27],"technique.":[28],"A":[29],"codesigned":[30],"series-<italic":[31],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[32,68,103],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">LC</i>":[33],"dual-mode":[34],"quadrature":[35],"ring":[36],"oscillator":[37],"(QRO)":[38],"edge-combining":[40],"doubler":[42,90],"operating":[43],"in":[44,75],"the":[45,49,79,89,105],"mm-waveband":[46],"jointly":[47],"extend":[48],"TR":[50,85],"while":[51,88],"suppressing":[52],"phase":[53],"noise":[54],"(PN).":[55],"Furthermore,":[56],"differential":[58],"time-aligning":[59],"technique":[60],"enables":[61],"exceptionally":[63],"wide":[64],"loop":[65],"bandwidth":[66],"(<inline-formula":[67],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[69],"<tex-math":[70],"notation=\"LaTeX\">$f_{\\text":[71],"{BW}}$</tex-math>":[72],"</inline-formula>).":[73],"Fabricated":[74],"28-nm":[76],"HPC+":[77],"CMOS,":[78],"prototype":[80],"QRO":[81],"exhibits":[82],"59.46%":[84],"(12.25\u201322.6":[86],"GHz),":[87],"output":[91],"spans":[92],"24.5\u201345.23":[93],"GHz.":[94,116],"Despite":[95],"its":[96],"core":[98],"area":[99],"of":[100,111],"0.037":[101],"mm<sup":[102],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>,":[104],"ILCM":[106],"achieves":[107],"rms":[109],"jitter":[110],"32.83":[112],"fs":[113],"at":[114],"39.5":[115]},"counts_by_year":[],"updated_date":"2026-06-21T07:57:09.225873","created_date":"2025-12-23T00:00:00"}
