{"id":"https://openalex.org/W4415883256","doi":"https://doi.org/10.1109/jssc.2025.3624476","title":"A 4.6-GHz 54.5-fs <sub>rms</sub> PLL-XO Co-Design Featuring a Pulse-Injection XO Driver","display_name":"A 4.6-GHz 54.5-fs <sub>rms</sub> PLL-XO Co-Design Featuring a Pulse-Injection XO Driver","publication_year":2025,"publication_date":"2025-11-04","ids":{"openalex":"https://openalex.org/W4415883256","doi":"https://doi.org/10.1109/jssc.2025.3624476"},"language":null,"primary_location":{"id":"doi:10.1109/jssc.2025.3624476","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2025.3624476","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020478073","display_name":"Can Livanelioglu","orcid":"https://orcid.org/0000-0001-7123-5761"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Can Livanelioglu","raw_affiliation_strings":["Department of Information Technology and Electrical Engineering, ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland"],"affiliations":[{"raw_affiliation_string":"Department of Information Technology and Electrical Engineering, ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086096209","display_name":"Long He","orcid":"https://orcid.org/0000-0002-4880-7159"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Long He","raw_affiliation_strings":["Department of Information Technology and Electrical Engineering, ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland"],"affiliations":[{"raw_affiliation_string":"Department of Information Technology and Electrical Engineering, ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083043131","display_name":"Jiang Gong","orcid":"https://orcid.org/0000-0001-6174-8176"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jiang Gong","raw_affiliation_strings":["Department of Information Technology and Electrical Engineering, ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland"],"affiliations":[{"raw_affiliation_string":"Department of Information Technology and Electrical Engineering, ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061671311","display_name":"Sina Arjmandpour","orcid":"https://orcid.org/0000-0002-4587-425X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Sina Arjmandpour","raw_affiliation_strings":["Department of Information Technology and Electrical Engineering, ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland"],"affiliations":[{"raw_affiliation_string":"Department of Information Technology and Electrical Engineering, ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007018395","display_name":"Gabriele Atzeni","orcid":"https://orcid.org/0000-0003-0346-4356"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Gabriele Atzeni","raw_affiliation_strings":["Department of Information Technology and Electrical Engineering, ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland"],"affiliations":[{"raw_affiliation_string":"Department of Information Technology and Electrical Engineering, ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011801401","display_name":"Taekwang Jang","orcid":"https://orcid.org/0000-0002-4651-0677"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Taekwang Jang","raw_affiliation_strings":["Department of Information Technology and Electrical Engineering, ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland"],"affiliations":[{"raw_affiliation_string":"Department of Information Technology and Electrical Engineering, ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5020478073"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.32197549,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"60","issue":"12","first_page":"4557","last_page":"4571"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9641000032424927,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9641000032424927,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.023900000378489494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12004","display_name":"Advanced Frequency and Time Standards","score":0.002400000113993883,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8744000196456909},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.6421999931335449},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.5810999870300293},{"id":"https://openalex.org/keywords/crystal-oscillator","display_name":"Crystal oscillator","score":0.5123000144958496},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.48080000281333923},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.47769999504089355},{"id":"https://openalex.org/keywords/harmonic","display_name":"Harmonic","score":0.4293999969959259},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.42579999566078186}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8744000196456909},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.6421999931335449},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.5810999870300293},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5382000207901001},{"id":"https://openalex.org/C172137495","wikidata":"https://www.wikidata.org/wiki/Q877055","display_name":"Crystal oscillator","level":3,"score":0.5123000144958496},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.48080000281333923},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.47769999504089355},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.45980000495910645},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.4341999888420105},{"id":"https://openalex.org/C127934551","wikidata":"https://www.wikidata.org/wiki/Q1148098","display_name":"Harmonic","level":2,"score":0.4293999969959259},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.42579999566078186},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.3955000042915344},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3637999892234802},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.3255999982357025},{"id":"https://openalex.org/C138268822","wikidata":"https://www.wikidata.org/wiki/Q1051925","display_name":"Resolution (logic)","level":2,"score":0.2955000102519989},{"id":"https://openalex.org/C186886427","wikidata":"https://www.wikidata.org/wiki/Q5441213","display_name":"Feedback loop","level":2,"score":0.28839999437332153},{"id":"https://openalex.org/C145018004","wikidata":"https://www.wikidata.org/wiki/Q4985944","display_name":"Buffer (optical fiber)","level":2,"score":0.2784999907016754},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.2736999988555908},{"id":"https://openalex.org/C42156128","wikidata":"https://www.wikidata.org/wiki/Q162641","display_name":"Total harmonic distortion","level":3,"score":0.27070000767707825},{"id":"https://openalex.org/C104111718","wikidata":"https://www.wikidata.org/wiki/Q2153973","display_name":"Ring oscillator","level":3,"score":0.26669999957084656},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.26669999957084656},{"id":"https://openalex.org/C177454536","wikidata":"https://www.wikidata.org/wiki/Q578290","display_name":"Emphasis (telecommunications)","level":2,"score":0.2612999975681305}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2025.3624476","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2025.3624476","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":44,"referenced_works":["https://openalex.org/W1571758417","https://openalex.org/W2038908392","https://openalex.org/W2055978681","https://openalex.org/W2078325913","https://openalex.org/W2084208879","https://openalex.org/W2093634133","https://openalex.org/W2097406868","https://openalex.org/W2098907338","https://openalex.org/W2099064239","https://openalex.org/W2104340505","https://openalex.org/W2123109015","https://openalex.org/W2135143797","https://openalex.org/W2276821538","https://openalex.org/W2528482522","https://openalex.org/W2745069591","https://openalex.org/W2790368996","https://openalex.org/W2791440917","https://openalex.org/W2855435326","https://openalex.org/W2899370677","https://openalex.org/W2921046765","https://openalex.org/W2921886179","https://openalex.org/W2953452135","https://openalex.org/W2972686022","https://openalex.org/W3004354595","https://openalex.org/W3015741591","https://openalex.org/W3016146368","https://openalex.org/W3047424327","https://openalex.org/W3080111270","https://openalex.org/W3135554245","https://openalex.org/W3176167732","https://openalex.org/W3189958273","https://openalex.org/W3198525795","https://openalex.org/W3200715165","https://openalex.org/W3214302083","https://openalex.org/W4220669729","https://openalex.org/W4245106664","https://openalex.org/W4295832453","https://openalex.org/W4310055006","https://openalex.org/W4312261872","https://openalex.org/W4360605781","https://openalex.org/W4394711750","https://openalex.org/W4401328414","https://openalex.org/W4408182533","https://openalex.org/W4408716460"],"related_works":[],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"a":[3,14,25,69,76,92,163],"power-efficient":[4],"and":[5,9,18,35,57,84,138,144,161,178],"low-jitter":[6,34],"frequency":[7],"generation":[8],"synthesis":[10],"architecture":[11],"that":[12],"leverages":[13],"phase-locked":[15],"loop":[16],"(PLL)":[17],"crystal":[19],"oscillator":[20],"(XO)":[21],"co-design,":[22],"integrated":[23,119],"with":[24,107],"pulse-injection":[26,109,159],"XO":[27,48,55],"driver.":[28],"The":[29,117,148],"proposed":[30],"co-design":[31],"exploits":[32],"the":[33,40,47,60,65,96,108,136,158,171,175],"fine":[36],"phase":[37,62,88],"resolution":[38],"of":[39,64,102,167,174],"PLL":[41],"output":[42],"to":[43,79,124],"inject":[44],"energy":[45],"into":[46],"precisely":[49],"at":[50,132],"low-impulse-sensitivity-function":[51],"(ISF)":[52],"points,":[53],"enhancing":[54],"performance":[56],"subsequently":[58],"reducing":[59],"in-band":[61],"noise":[63],"PLL.":[66],"In":[67],"addition,":[68],"low-kickback":[70],"reference":[71,137,179],"buffer":[72,87],"is":[73,127],"introduced,":[74],"utilizing":[75],"cascoded":[77],"transistor":[78],"mitigate":[80],"buffer-induced":[81],"switching":[82],"kickback":[83],"further":[85],"suppress":[86],"noise.":[89],"Fabricated":[90],"in":[91],"22-nm":[93],"FDSOI":[94],"process,":[95],"prototype":[97],"occupies":[98],"an":[99],"active":[100],"area":[101],"1.14":[103],"mm<sup":[104,114],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[105,115,130],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>,":[106],"driver":[110],"consuming":[111],"only":[112],"0.014":[113],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>.":[116],"measured":[118],"jitter":[120,164],"from":[121],"1":[122],"kHz":[123],"100":[125],"MHz":[126],"54.5":[128],"fs<sub":[129],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">rms</sub>":[131],"4.6":[133],"GHz,":[134],"while":[135],"second":[139],"harmonic":[140],"spurs":[141],"are":[142],"\u221271":[143],"\u221270.4":[145],"dBc,":[146],"respectively.":[147],"complete":[149],"system":[150],"consumes":[151],"7.24":[152],"mW,":[153],"including":[154],"1.92":[155],"mW":[156],"for":[157],"driver,":[160],"achieves":[162],"figure-of-merit":[165],"(FoM)":[166],"\u2212256.7":[168],"dB,":[169],"capturing":[170],"combined":[172],"contributions":[173],"PLL,":[176],"XO,":[177],"buffer.":[180]},"counts_by_year":[],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-11-04T00:00:00"}
