{"id":"https://openalex.org/W4415179296","doi":"https://doi.org/10.1109/jssc.2025.3618188","title":"A 112-Gb/s Discrete Multitone Wireline Receiver Datapath With Time-Interleaved Time-Based ADC in 5-nm FinFET","display_name":"A 112-Gb/s Discrete Multitone Wireline Receiver Datapath With Time-Interleaved Time-Based ADC in 5-nm FinFET","publication_year":2025,"publication_date":"2025-10-14","ids":{"openalex":"https://openalex.org/W4415179296","doi":"https://doi.org/10.1109/jssc.2025.3618188"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2025.3618188","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2025.3618188","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100329207","display_name":"Jaewon Lee","orcid":"https://orcid.org/0000-0003-3222-5020"},"institutions":[{"id":"https://openalex.org/I193352282","display_name":"Daegu Gyeongbuk Institute of Science and Technology","ror":"https://ror.org/03frjya69","country_code":"KR","type":"education","lineage":["https://openalex.org/I193352282"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jaewon Lee","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea","institution_ids":["https://openalex.org/I193352282"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014994900","display_name":"Pier Andrea Francese","orcid":"https://orcid.org/0000-0003-2944-9058"},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Pier-Andrea Francese","raw_affiliation_strings":["IBM Research Europe Z&#x00FC;rich Laboratory, R&#x00FC;schlikon, Switzerland"],"raw_orcid":"https://orcid.org/0000-0003-2944-9058","affiliations":[{"raw_affiliation_string":"IBM Research Europe Z&#x00FC;rich Laboratory, R&#x00FC;schlikon, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032768794","display_name":"Matthias Br\u00e4endli","orcid":"https://orcid.org/0000-0003-1995-7593"},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Matthias Br\u00e4endli","raw_affiliation_strings":["IBM Research Europe Z&#x00FC;rich Laboratory, R&#x00FC;schlikon, Switzerland"],"raw_orcid":"https://orcid.org/0000-0003-1995-7593","affiliations":[{"raw_affiliation_string":"IBM Research Europe Z&#x00FC;rich Laboratory, R&#x00FC;schlikon, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088828887","display_name":"Thomas Morf","orcid":"https://orcid.org/0000-0002-2712-6653"},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Thomas Morf","raw_affiliation_strings":["IBM Research Europe Z&#x00FC;rich Laboratory, R&#x00FC;schlikon, Switzerland"],"raw_orcid":"https://orcid.org/0000-0002-2712-6653","affiliations":[{"raw_affiliation_string":"IBM Research Europe Z&#x00FC;rich Laboratory, R&#x00FC;schlikon, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085908094","display_name":"Marcel Kossel","orcid":"https://orcid.org/0000-0003-3053-2422"},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Marcel Kossel","raw_affiliation_strings":["IBM Research Europe Z&#x00FC;rich Laboratory, R&#x00FC;schlikon, Switzerland"],"raw_orcid":"https://orcid.org/0000-0003-3053-2422","affiliations":[{"raw_affiliation_string":"IBM Research Europe Z&#x00FC;rich Laboratory, R&#x00FC;schlikon, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103265925","display_name":"S.M. Jang","orcid":"https://orcid.org/0009-0008-1056-0470"},"institutions":[{"id":"https://openalex.org/I193352282","display_name":"Daegu Gyeongbuk Institute of Science and Technology","ror":"https://ror.org/03frjya69","country_code":"KR","type":"education","lineage":["https://openalex.org/I193352282"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seoyoung Jang","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea"],"raw_orcid":"https://orcid.org/0009-0008-1056-0470","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea","institution_ids":["https://openalex.org/I193352282"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113350684","display_name":"Yujin Choi","orcid":"https://orcid.org/0009-0006-2364-8768"},"institutions":[{"id":"https://openalex.org/I193352282","display_name":"Daegu Gyeongbuk Institute of Science and Technology","ror":"https://ror.org/03frjya69","country_code":"KR","type":"education","lineage":["https://openalex.org/I193352282"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Yujin Choi","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea"],"raw_orcid":"https://orcid.org/0009-0006-2364-8768","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea","institution_ids":["https://openalex.org/I193352282"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076277508","display_name":"Donggeon Kim","orcid":"https://orcid.org/0009-0008-9512-7915"},"institutions":[{"id":"https://openalex.org/I193352282","display_name":"Daegu Gyeongbuk Institute of Science and Technology","ror":"https://ror.org/03frjya69","country_code":"KR","type":"education","lineage":["https://openalex.org/I193352282"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Donggeon Kim","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea"],"raw_orcid":"https://orcid.org/0009-0008-9512-7915","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea","institution_ids":["https://openalex.org/I193352282"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011801401","display_name":"Taekwang Jang","orcid":"https://orcid.org/0000-0002-4651-0677"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Taekwang Jang","raw_affiliation_strings":["Department of Information Technology and Electrical Engineering, ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland"],"raw_orcid":"https://orcid.org/0000-0002-4651-0677","affiliations":[{"raw_affiliation_string":"Department of Information Technology and Electrical Engineering, ETH Z&#x00FC;rich, Z&#x00FC;rich, Switzerland","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073822029","display_name":"Gain Kim","orcid":"https://orcid.org/0000-0002-3680-8816"},"institutions":[{"id":"https://openalex.org/I193352282","display_name":"Daegu Gyeongbuk Institute of Science and Technology","ror":"https://ror.org/03frjya69","country_code":"KR","type":"education","lineage":["https://openalex.org/I193352282"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Gain Kim","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-3680-8816","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea","institution_ids":["https://openalex.org/I193352282"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3075,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.55834924,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":"61","issue":"1","first_page":"8","last_page":"19"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/wireline","display_name":"Wireline","score":0.8866999745368958},{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.8597000241279602},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.49390000104904175},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.4489000141620636},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.42160001397132874},{"id":"https://openalex.org/keywords/digital-subscriber-line","display_name":"Digital subscriber line","score":0.42089998722076416},{"id":"https://openalex.org/keywords/equalizer","display_name":"Equalizer","score":0.3774999976158142},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.3544999957084656},{"id":"https://openalex.org/keywords/companding","display_name":"Companding","score":0.34200000762939453}],"concepts":[{"id":"https://openalex.org/C2776951270","wikidata":"https://www.wikidata.org/wiki/Q8026910","display_name":"Wireline","level":3,"score":0.8866999745368958},{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.8597000241279602},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5939000248908997},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5932000279426575},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.49390000104904175},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.4489000141620636},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.42160001397132874},{"id":"https://openalex.org/C201374245","wikidata":"https://www.wikidata.org/wiki/Q104534","display_name":"Digital subscriber line","level":2,"score":0.42089998722076416},{"id":"https://openalex.org/C67545415","wikidata":"https://www.wikidata.org/wiki/Q5384218","display_name":"Equalizer","level":3,"score":0.3774999976158142},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37450000643730164},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.36000001430511475},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.3544999957084656},{"id":"https://openalex.org/C104250799","wikidata":"https://www.wikidata.org/wiki/Q1780765","display_name":"Companding","level":4,"score":0.34200000762939453},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.3287999927997589},{"id":"https://openalex.org/C57733114","wikidata":"https://www.wikidata.org/wiki/Q1006032","display_name":"Discrete Fourier transform (general)","level":5,"score":0.325300008058548},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3124000132083893},{"id":"https://openalex.org/C40409654","wikidata":"https://www.wikidata.org/wiki/Q375889","display_name":"Orthogonal frequency-division multiplexing","level":3,"score":0.29750001430511475},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.28870001435279846},{"id":"https://openalex.org/C187919765","wikidata":"https://www.wikidata.org/wiki/Q270159","display_name":"8-bit","level":2,"score":0.28360000252723694},{"id":"https://openalex.org/C56296756","wikidata":"https://www.wikidata.org/wiki/Q840922","display_name":"Bit error rate","level":3,"score":0.2782999873161316},{"id":"https://openalex.org/C2776310492","wikidata":"https://www.wikidata.org/wiki/Q3271420","display_name":"12-bit","level":3,"score":0.2754000127315521},{"id":"https://openalex.org/C104111718","wikidata":"https://www.wikidata.org/wiki/Q2153973","display_name":"Ring oscillator","level":3,"score":0.2711000144481659},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.2653999924659729},{"id":"https://openalex.org/C52773712","wikidata":"https://www.wikidata.org/wiki/Q175022","display_name":"Digital signal","level":3,"score":0.2597000002861023},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.25600001215934753},{"id":"https://openalex.org/C75755367","wikidata":"https://www.wikidata.org/wiki/Q104531076","display_name":"Equalization (audio)","level":3,"score":0.2549000084400177},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2549000084400177},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.25200000405311584},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.25200000405311584},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.2515000104904175},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.25119999051094055}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2025.3618188","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2025.3618188","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W2109170656","https://openalex.org/W2123068486","https://openalex.org/W2138706041","https://openalex.org/W2570488823","https://openalex.org/W2922529696","https://openalex.org/W2976506721","https://openalex.org/W3000059814","https://openalex.org/W3015371280","https://openalex.org/W3015421532","https://openalex.org/W3015563675","https://openalex.org/W3120447091","https://openalex.org/W3132180131","https://openalex.org/W3199475090","https://openalex.org/W4220687916","https://openalex.org/W4220990651","https://openalex.org/W4285113034","https://openalex.org/W4316022137","https://openalex.org/W4360605414","https://openalex.org/W4383503962","https://openalex.org/W4399450821","https://openalex.org/W4401908322","https://openalex.org/W4408183574","https://openalex.org/W4409095519"],"related_works":[],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"a":[3,13,26,36,40,80],"112-Gb/s":[4],"discrete":[5],"multitone":[6],"(DMT)":[7],"wireline":[8],"receiver":[9],"(RX)":[10],"datapath":[11],"with":[12,74],"50-GS/s,":[14],"8-bit,":[15],"64-way":[16,81],"($8":[17],"\\times":[18],"8$)":[19],"time-interleaved":[20],"time-based":[21],"analog-to-digital":[22],"converter":[23],"(TI-TBADC)":[24],"in":[25],"5-nm":[27],"FinFET.":[28],"The":[29,62,107],"TBADC":[30],"converts":[31],"the":[32,48,53,116],"voltage":[33],"input":[34],"into":[35],"time-domain":[37],"quantity":[38],"using":[39],"ring":[41],"oscillator":[42],"(ROSC).":[43],"Eight-slice":[44],"TBADCs,":[45],"driven":[46],"from":[47],"same":[49],"first-rank":[50],"interleaver,":[51],"share":[52],"identical":[54],"injection-locked":[55],"ROSC":[56],"(IROSC)":[57],"for":[58],"voltage-to-time":[59],"conversion":[60],"(VTC).":[61],"DMT":[63],"digital":[64],"signal":[65],"processor":[66],"(DSP)":[67],"achieves":[68],"optimal":[69],"bit":[70],"and":[71,129],"power":[72,128],"loading":[73],"63":[75],"orthogonal":[76],"subchannels":[77],"by":[78],"employing":[79],"single-stage":[82],"multi-path":[83],"delay":[84],"feedback":[85],"(MDF)":[86],"fast":[87],"Fourier":[88],"transform":[89],"(FFT)":[90],"core.":[91],"An":[92],"on-chip":[93],"sign-sign":[94],"least":[95],"mean":[96],"square":[97],"(SS-LMS)":[98],"engine":[99],"adapts":[100],"equalizer":[101],"coefficients":[102],"to":[103],"combat":[104],"channel":[105],"fluctuation.":[106],"RX":[108],"prototype":[109],"demonstrates":[110],"4E-4":[111],"BER":[112],"when":[113],"communicating":[114],"over":[115],"channel,":[117],"exhibiting":[118],"18-dB":[119],"insertion":[120],"loss":[121],"(IL)":[122],"at":[123],"Nyquist,":[124],"while":[125],"consuming":[126],"347-mW":[127],"0.242-mm2silicon":[130],"area.":[131]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-15T00:00:00"}
