{"id":"https://openalex.org/W4414008582","doi":"https://doi.org/10.1109/jssc.2025.3604246","title":"A 0.0006-mm <sup>2</sup> , 0.13-pJ/bit, 9\u201321-Gb/s Sub-Sampling CDR With Inverter-Based Frequency Multiplier and Embedded 1:3 DEMUX in 65-nm CMOS","display_name":"A 0.0006-mm <sup>2</sup> , 0.13-pJ/bit, 9\u201321-Gb/s Sub-Sampling CDR With Inverter-Based Frequency Multiplier and Embedded 1:3 DEMUX in 65-nm CMOS","publication_year":2025,"publication_date":"2025-09-05","ids":{"openalex":"https://openalex.org/W4414008582","doi":"https://doi.org/10.1109/jssc.2025.3604246"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2025.3604246","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2025.3604246","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004631913","display_name":"Zhicheng Dong","orcid":"https://orcid.org/0009-0005-3584-1453"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Zhicheng Dong","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0009-0005-3584-1453","affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003457423","display_name":"Xiaoteng Zhao","orcid":"https://orcid.org/0000-0002-9447-8763"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoteng Zhao","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0002-9447-8763","affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Zekai Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zekai Yang","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101827861","display_name":"Xianting Su","orcid":"https://orcid.org/0009-0009-1403-7094"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xianting Su","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0009-0009-1403-7094","affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047256160","display_name":"Haolin Han","orcid":"https://orcid.org/0000-0003-4566-1569"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Haolin Han","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0003-4566-1569","affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051442708","display_name":"Feng Bu","orcid":"https://orcid.org/0000-0003-3761-6848"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Feng Bu","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087274166","display_name":"Depeng Sun","orcid":"https://orcid.org/0009-0002-2646-0235"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Depeng Sun","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0009-0002-2646-0235","affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100635138","display_name":"Shubin Liu","orcid":"https://orcid.org/0000-0002-9942-0069"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shubin Liu","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0002-9942-0069","affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039575274","display_name":"Zhangming Zhu","orcid":"https://orcid.org/0000-0002-7764-1928"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhangming Zhu","raw_affiliation_strings":["Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0002-7764-1928","affiliations":[{"raw_affiliation_string":"Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":9,"corresponding_author_ids":["https://openalex.org/A5004631913"],"corresponding_institution_ids":["https://openalex.org/I149594827"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.21402401,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"61","issue":"5","first_page":"2059","last_page":"2072"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.7984447479248047},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.639336347579956},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.6201544404029846},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.593392550945282},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.5715963840484619},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.47319409251213074},{"id":"https://openalex.org/keywords/4-bit","display_name":"4-bit","score":0.46495068073272705},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.43448543548583984},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3801037073135376},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.35613125562667847},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3010958731174469},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.22386601567268372},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.20814025402069092},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1512930989265442},{"id":"https://openalex.org/keywords/optics","display_name":"Optics","score":0.14845013618469238},{"id":"https://openalex.org/keywords/quantum-mechanics","display_name":"Quantum mechanics","score":0.09041336178779602}],"concepts":[{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.7984447479248047},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.639336347579956},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.6201544404029846},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.593392550945282},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.5715963840484619},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.47319409251213074},{"id":"https://openalex.org/C194986542","wikidata":"https://www.wikidata.org/wiki/Q229932","display_name":"4-bit","level":3,"score":0.46495068073272705},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.43448543548583984},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3801037073135376},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.35613125562667847},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3010958731174469},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.22386601567268372},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.20814025402069092},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1512930989265442},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.14845013618469238},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.09041336178779602},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2025.3604246","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2025.3604246","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G2351528596","display_name":null,"funder_award_id":"62227816","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G5508675139","display_name":null,"funder_award_id":"62374126","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G7009689543","display_name":null,"funder_award_id":"92473201","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2544361057","https://openalex.org/W1824649256","https://openalex.org/W2810874257","https://openalex.org/W2028353274","https://openalex.org/W3149091528","https://openalex.org/W2944782356","https://openalex.org/W2945916608","https://openalex.org/W2545455880","https://openalex.org/W4410296103","https://openalex.org/W2984938468"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"a":[3,27,81,114,130,140],"9\u201321-Gb/s":[4],"inductor-less":[5],"frequency-multiplying":[6],"sub-sampling":[7,66],"(FXSS)":[8],"clock":[9,47],"and":[10,33,56,112,121],"data":[11],"recovery":[12],"(CDR)":[13],"circuit":[14],"with":[15,30,139],"an":[16],"embedded":[17],"1:3":[18],"demultiplexer":[19],"(DEMUX)":[20],"for":[21],"multi-lane":[22],"serial":[23],"interfaces.":[24],"It":[25,128],"features":[26],"compact":[28],"design":[29],"linear":[31],"modeling":[32],"theoretical":[34],"analysis":[35],"of":[36,134,145],"the":[37,46,51,104],"FXSS":[38],"architecture.":[39],"An":[40],"inverter-based":[41],"frequency":[42],"multiplier":[43],"(FX)":[44],"in":[45,100],"feedback":[48],"path":[49],"enables":[50],"ring":[52],"voltage-controlled":[53],"oscillator":[54],"(RVCO)":[55],"transmission-gated":[57],"retimers":[58],"to":[59],"operate":[60],"at":[61,125],"one-third":[62],"rates.":[63],"The":[64,74],"primary\u2013secondary":[65],"phase":[67],"detector":[68],"(SSPD)":[69],"supports":[70],"full-rate":[71],"triple-frequency":[72],"clocks.":[73],"FX":[75],"can":[76],"suppress":[77],"in-band":[78],"noises,":[79],"while":[80],"~200-MHz":[82],"loop":[83],"bandwidth":[84],"(BW)":[85],"mitigates":[86],"out-of-band":[87],"RVCO":[88],"noise.":[89],"A":[90],"duty":[91],"cycle":[92],"corrector":[93],"(DCC)":[94],"ensures":[95],"fine":[96],"retiming":[97],"deskew.":[98],"Fabricated":[99],"65-nm":[101],"CMOS":[102],"technology,":[103],"proposed":[105],"CDR":[106],"occupies":[107],"0.0006":[108],"mm<sup":[109],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[110,117,137,149],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[111],"achieves":[113],"best-in-class":[115],"348.2-fs<sub":[116],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">rms</sub>":[118],"integrated":[119],"jitter":[120,131],"0.13-pJ/bit":[122],"energy":[123],"efficiency":[124],"21":[126],"Gb/s.":[127],"demonstrates":[129],"tolerance":[132],"(JTOL)":[133],"0.44":[135],"UI<sub":[136],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">pp</sub>":[138],"bit":[141],"error":[142],"rate":[143],"(BER)":[144],"less":[146],"than":[147],"<inline-formula":[148],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[150],"<tex-math":[151],"notation=\"LaTeX\">$10^{-12}$</tex-math>":[152],"</inline-formula>.":[153]},"counts_by_year":[],"updated_date":"2026-04-25T06:01:18.069262","created_date":"2025-10-10T00:00:00"}
