{"id":"https://openalex.org/W4410809258","doi":"https://doi.org/10.1109/jssc.2025.3571315","title":"A 22-nm 109.3-to-249.5-TFLOPS/W Outlier-Aware Floating-Point SRAM Compute-in-Memory Macro for Large Language Models","display_name":"A 22-nm 109.3-to-249.5-TFLOPS/W Outlier-Aware Floating-Point SRAM Compute-in-Memory Macro for Large Language Models","publication_year":2025,"publication_date":"2025-05-28","ids":{"openalex":"https://openalex.org/W4410809258","doi":"https://doi.org/10.1109/jssc.2025.3571315"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2025.3571315","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2025.3571315","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5071405687","display_name":"Siqi He","orcid":"https://orcid.org/0009-0002-0916-8486"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Siqi He","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037971089","display_name":"Haozhe Zhu","orcid":"https://orcid.org/0000-0002-6412-3996"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Haozhe Zhu","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100660001","display_name":"Hongyi Zhang","orcid":"https://orcid.org/0009-0006-6676-9543"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hongyi Zhang","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5118820781","display_name":"Yujie Ma","orcid":"https://orcid.org/0009-0002-8401-054X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yujie Ma","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034705173","display_name":"Zexing Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zexing Chen","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022603342","display_name":"Mengjie Li","orcid":"https://orcid.org/0000-0002-5766-4225"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Mengjie Li","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078440143","display_name":"Danfeng Zhai","orcid":"https://orcid.org/0000-0002-1616-9906"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Danfeng Zhai","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051205321","display_name":"Chixiao Chen","orcid":"https://orcid.org/0000-0002-5980-4236"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chixiao Chen","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100453158","display_name":"Qi Liu","orcid":"https://orcid.org/0000-0001-7062-831X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qi Liu","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100656792","display_name":"Xiaoyang Zeng","orcid":"https://orcid.org/0000-0003-3986-137X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoyang Zeng","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100343852","display_name":"Ming Liu","orcid":"https://orcid.org/0000-0001-6239-1180"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ming Liu","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":11,"corresponding_author_ids":["https://openalex.org/A5071405687"],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":1.3947,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.8206567,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":96},"biblio":{"volume":"61","issue":"2","first_page":"736","last_page":"749"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9930999875068665,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9930999875068665,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9889000058174133,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9825000166893005,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.7894089221954346},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6300204992294312},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5529353022575378},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5278910398483276},{"id":"https://openalex.org/keywords/point","display_name":"Point (geometry)","score":0.491823673248291},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.32581228017807007},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.25756973028182983},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.18916848301887512},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1656666398048401}],"concepts":[{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.7894089221954346},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6300204992294312},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5529353022575378},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5278910398483276},{"id":"https://openalex.org/C28719098","wikidata":"https://www.wikidata.org/wiki/Q44946","display_name":"Point (geometry)","level":2,"score":0.491823673248291},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.32581228017807007},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.25756973028182983},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.18916848301887512},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1656666398048401},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2025.3571315","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2025.3571315","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3231766933","display_name":null,"funder_award_id":"62304047","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G4906109994","display_name":null,"funder_award_id":"62488101","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G5218974994","display_name":null,"funder_award_id":"2024ZY2B0070","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W2093647425","https://openalex.org/W2790511620","https://openalex.org/W2920866490","https://openalex.org/W2921329602","https://openalex.org/W3015432327","https://openalex.org/W3015982917","https://openalex.org/W3134304371","https://openalex.org/W3134526034","https://openalex.org/W3138516171","https://openalex.org/W3172967059","https://openalex.org/W3183406752","https://openalex.org/W4220929376","https://openalex.org/W4221089937","https://openalex.org/W4221101426","https://openalex.org/W4233996382","https://openalex.org/W4286571878","https://openalex.org/W4308090212","https://openalex.org/W4360605483","https://openalex.org/W4360605703","https://openalex.org/W4360606939","https://openalex.org/W4366341968","https://openalex.org/W4380881077","https://openalex.org/W4385245566","https://openalex.org/W4391876879","https://openalex.org/W4392739417","https://openalex.org/W4392745861","https://openalex.org/W4392745879","https://openalex.org/W4392746069","https://openalex.org/W4392746125","https://openalex.org/W4392775632","https://openalex.org/W4393147284","https://openalex.org/W4399146343","https://openalex.org/W4399768582","https://openalex.org/W4401211806","https://openalex.org/W4401211807","https://openalex.org/W4401328386","https://openalex.org/W4401881162"],"related_works":["https://openalex.org/W2030816003","https://openalex.org/W4392590355","https://openalex.org/W4239992647","https://openalex.org/W2150013480","https://openalex.org/W1554458299","https://openalex.org/W81423522","https://openalex.org/W1509860481","https://openalex.org/W2488264085","https://openalex.org/W2076325756","https://openalex.org/W3151633427"],"abstract_inverted_index":{"Large":[0],"language":[1],"models":[2],"(LLMs)":[3],"have":[4],"demonstrated":[5],"exceptional":[6],"performance":[7],"in":[8,98,174,213,219],"complex":[9],"artificial":[10],"intelligence":[11],"(AI)":[12],"tasks.":[13],"However,":[14],"their":[15],"rapidly":[16],"increasing":[17],"parameter":[18],"sizes":[19],"lead":[20],"to":[21,29,49,76,188,231],"significant":[22],"communication":[23],"and":[24,34,53,60,71,88,105,133,167,177,216],"computational":[25],"overhead,":[26],"posing":[27],"challenges":[28],"the":[30,67,100,190,195],"energy":[31],"efficiency":[32],"(EEF)":[33],"memory":[35,72],"footprint":[36],"of":[37,102,130,210],"AI":[38],"processors.":[39],"Compute-in-memory":[40],"(CIM)":[41],"architecture":[42],"has":[43,95,106],"emerged":[44],"as":[45],"a":[46,108,179,223],"promising":[47],"solution":[48],"alleviate":[50],"bandwidth":[51],"constraints":[52],"improve":[54],"EEF.":[55],"Nonetheless,":[56],"both":[57],"integer":[58],"(INT)":[59],"floating-point":[61],"(FP)":[62],"CIM":[63,123],"implementations":[64],"struggle":[65],"with":[66,183],"trade-off":[68],"between":[69],"accuracy":[70,101],"requirement":[73],"when":[74],"applied":[75],"LLMs.":[77],"Outlier-aware":[78],"quantization":[79],"(OAQ),":[80],"which":[81,148,206],"employs":[82],"low-precision":[83],"formats":[84,91],"for":[85,92,111],"normal":[86,135],"values":[87],"retains":[89],"FP":[90,175],"high-magnitude":[93],"outliers,":[94],"proven":[96],"effective":[97],"matching":[99],"full-FP":[103],"baselines":[104],"become":[107],"mainstream":[109],"approach":[110],"efficient":[112,150],"LLM":[113],"deployment.":[114],"Therefore,":[115],"this":[116],"work":[117],"presents":[118],"OA-CIM,":[119],"an":[120,142,156,208],"SRAM-based":[121],"digital":[122],"macro":[124],"that":[125,164],"facilitates":[126],"element-wise":[127],"hybrid":[128],"processing":[129],"BF16":[131],"outliers":[132],"INT4":[134,214],"values.":[136],"The":[137],"major":[138],"contributions":[139],"are:":[140],"1)":[141],"LUT-based":[143],"multiply-and-accumulate":[144],"(MAC)":[145],"circuit":[146,182],"design,":[147],"supports":[149],"FP/INT-compatible":[151],"(FIC)":[152],"MAC":[153],"operations;":[154],"2)":[155],"<sc":[157],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[158,225,233],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">xor</small>-sharing":[159],"non-maximum":[160],"exponent":[161,172],"gating":[162],"scheme":[163],"reduces":[165],"latency":[166],"area":[168],"by":[169],"bypassing":[170],"unnecessary":[171],"comparisons":[173],"dataflow;":[176],"3)":[178],"sparsity-aware":[180],"readout":[181],"distribution-offset":[184],"weight":[185],"encoding":[186],"(DOWE)":[187],"mitigate":[189],"power-intensive":[191],"charging/discharging":[192],"process":[193],"on":[194],"bitline.":[196],"A":[197],"22-nm":[198],"512-kB":[199],"8T":[200],"SRAM":[201],"OA-CIM":[202],"prototype":[203],"is":[204],"fabricated,":[205],"achieves":[207],"EEF":[209],"346.6":[211],"TOPS/W":[212],"mode":[215],"249.5":[217],"TFLOPS/W":[218],"outlier":[220],"mode,":[221],"representing":[222],"<inline-formula":[224,232],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[226,234],"<tex-math":[227,235],"notation=\"LaTeX\">$2.7{\\times":[228],"}$</tex-math>":[229,237],"</inline-formula>":[230,238],"notation=\"LaTeX\">$3.1{\\times":[236],"improvement":[239],"over":[240],"state-of-the-art":[241],"mixed-precision":[242],"CIMs.":[243]},"counts_by_year":[{"year":2025,"cited_by_count":2}],"updated_date":"2026-04-09T08:11:56.329763","created_date":"2025-10-10T00:00:00"}
