{"id":"https://openalex.org/W4404628891","doi":"https://doi.org/10.1109/jssc.2024.3489793","title":"A 16-kB 65-nm GC-eDRAM Macro With Internal Bias Voltage Generation Providing Over 100-<i>\u03bc</i>s Retention Time","display_name":"A 16-kB 65-nm GC-eDRAM Macro With Internal Bias Voltage Generation Providing Over 100-<i>\u03bc</i>s Retention Time","publication_year":2024,"publication_date":"2024-11-22","ids":{"openalex":"https://openalex.org/W4404628891","doi":"https://doi.org/10.1109/jssc.2024.3489793"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2024.3489793","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2024.3489793","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036678971","display_name":"Odem Harel","orcid":"https://orcid.org/0000-0002-1429-4906"},"institutions":[{"id":"https://openalex.org/I13955877","display_name":"Bar-Ilan University","ror":"https://ror.org/03kgsv495","country_code":"IL","type":"education","lineage":["https://openalex.org/I13955877"]}],"countries":["IL"],"is_corresponding":true,"raw_author_name":"Odem Harel","raw_affiliation_strings":["Emerging Nanoscaled Integrated Circuits and Systems (EnICS) Laboratories, Faculty of Engineering, Bar-Ilan University, Ramat Gan, Israel","Faculty of Engineering, Emerging Nanoscaled Integrated Circuits and Systems (EnICS) Laboratories, Bar-Ilan University, Ramat Gan, Israel"],"raw_orcid":"https://orcid.org/0000-0002-1429-4906","affiliations":[{"raw_affiliation_string":"Emerging Nanoscaled Integrated Circuits and Systems (EnICS) Laboratories, Faculty of Engineering, Bar-Ilan University, Ramat Gan, Israel","institution_ids":["https://openalex.org/I13955877"]},{"raw_affiliation_string":"Faculty of Engineering, Emerging Nanoscaled Integrated Circuits and Systems (EnICS) Laboratories, Bar-Ilan University, Ramat Gan, Israel","institution_ids":["https://openalex.org/I13955877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055899645","display_name":"H. Andac Yigit","orcid":"https://orcid.org/0000-0001-8116-7977"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Andac Yigit","raw_affiliation_strings":["&#x00C9;cole Polytechnique F&#x00E9;d&#x00E9;rale de Lausanne, Lausanne, Switzerland"],"raw_orcid":"https://orcid.org/0000-0001-8116-7977","affiliations":[{"raw_affiliation_string":"&#x00C9;cole Polytechnique F&#x00E9;d&#x00E9;rale de Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5114755055","display_name":"Eliana Feifel","orcid":null},"institutions":[{"id":"https://openalex.org/I13955877","display_name":"Bar-Ilan University","ror":"https://ror.org/03kgsv495","country_code":"IL","type":"education","lineage":["https://openalex.org/I13955877"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Eliana Feifel","raw_affiliation_strings":["Emerging Nanoscaled Integrated Circuits and Systems (EnICS) Laboratories, Faculty of Engineering, Bar-Ilan University, Ramat Gan, Israel","Faculty of Engineering, Emerging Nanoscaled Integrated Circuits and Systems (EnICS) Laboratories, Bar-Ilan University, Ramat Gan, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Emerging Nanoscaled Integrated Circuits and Systems (EnICS) Laboratories, Faculty of Engineering, Bar-Ilan University, Ramat Gan, Israel","institution_ids":["https://openalex.org/I13955877"]},{"raw_affiliation_string":"Faculty of Engineering, Emerging Nanoscaled Integrated Circuits and Systems (EnICS) Laboratories, Bar-Ilan University, Ramat Gan, Israel","institution_ids":["https://openalex.org/I13955877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034618529","display_name":"Robert Giterman","orcid":"https://orcid.org/0000-0002-1410-4746"},"institutions":[{"id":"https://openalex.org/I2800389475","display_name":"Rabin Medical Center","ror":"https://ror.org/01vjtf564","country_code":"IL","type":"healthcare","lineage":["https://openalex.org/I2800389475","https://openalex.org/I64767286"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Robert Giterman","raw_affiliation_strings":["RAAAM Memory Technologies Ltd., Petah Tikva, Israel","RAAAM Memory Technologies Ltd, Petah Tikva, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"RAAAM Memory Technologies Ltd., Petah Tikva, Israel","institution_ids":["https://openalex.org/I2800389475"]},{"raw_affiliation_string":"RAAAM Memory Technologies Ltd, Petah Tikva, Israel","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059133771","display_name":"Andreas Burg","orcid":"https://orcid.org/0000-0002-7270-5558"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Andreas Burg","raw_affiliation_strings":["&#x00C9;cole Polytechnique F&#x00E9;d&#x00E9;rale de Lausanne, Lausanne, Switzerland"],"raw_orcid":"https://orcid.org/0000-0002-7270-5558","affiliations":[{"raw_affiliation_string":"&#x00C9;cole Polytechnique F&#x00E9;d&#x00E9;rale de Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026444183","display_name":"Adam Teman","orcid":"https://orcid.org/0000-0002-8233-4711"},"institutions":[{"id":"https://openalex.org/I13955877","display_name":"Bar-Ilan University","ror":"https://ror.org/03kgsv495","country_code":"IL","type":"education","lineage":["https://openalex.org/I13955877"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Adam Teman","raw_affiliation_strings":["Emerging Nanoscaled Integrated Circuits and Systems (EnICS) Laboratories, Faculty of Engineering, Bar-Ilan University, Ramat Gan, Israel","Faculty of Engineering, Emerging Nanoscaled Integrated Circuits and Systems (EnICS) Laboratories, Bar-Ilan University, Ramat Gan, Israel"],"raw_orcid":"https://orcid.org/0000-0002-8233-4711","affiliations":[{"raw_affiliation_string":"Emerging Nanoscaled Integrated Circuits and Systems (EnICS) Laboratories, Faculty of Engineering, Bar-Ilan University, Ramat Gan, Israel","institution_ids":["https://openalex.org/I13955877"]},{"raw_affiliation_string":"Faculty of Engineering, Emerging Nanoscaled Integrated Circuits and Systems (EnICS) Laboratories, Bar-Ilan University, Ramat Gan, Israel","institution_ids":["https://openalex.org/I13955877"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5036678971"],"corresponding_institution_ids":["https://openalex.org/I13955877"],"apc_list":null,"apc_paid":null,"fwci":0.7564,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.72378736,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":99},"biblio":{"volume":"60","issue":"6","first_page":"2239","last_page":"2248"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9937999844551086,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9927999973297119,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/retention-time","display_name":"Retention time","score":0.7353039383888245},{"id":"https://openalex.org/keywords/data-retention","display_name":"Data retention","score":0.49691227078437805},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.46485602855682373},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.4234354496002197},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3936362862586975},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.26923424005508423},{"id":"https://openalex.org/keywords/chemistry","display_name":"Chemistry","score":0.24120807647705078},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.23783552646636963},{"id":"https://openalex.org/keywords/chromatography","display_name":"Chromatography","score":0.17011451721191406},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14145851135253906}],"concepts":[{"id":"https://openalex.org/C3020018676","wikidata":"https://www.wikidata.org/wiki/Q170050","display_name":"Retention time","level":2,"score":0.7353039383888245},{"id":"https://openalex.org/C2780866740","wikidata":"https://www.wikidata.org/wiki/Q5227345","display_name":"Data retention","level":2,"score":0.49691227078437805},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.46485602855682373},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.4234354496002197},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3936362862586975},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.26923424005508423},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.24120807647705078},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.23783552646636963},{"id":"https://openalex.org/C43617362","wikidata":"https://www.wikidata.org/wiki/Q170050","display_name":"Chromatography","level":1,"score":0.17011451721191406},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14145851135253906}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2024.3489793","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2024.3489793","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8100000023841858,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W1619268095","https://openalex.org/W1827639723","https://openalex.org/W1971936677","https://openalex.org/W1972121063","https://openalex.org/W2002293402","https://openalex.org/W2035385641","https://openalex.org/W2070905822","https://openalex.org/W2091764549","https://openalex.org/W2097538613","https://openalex.org/W2132357267","https://openalex.org/W2161091390","https://openalex.org/W2291031920","https://openalex.org/W2527198471","https://openalex.org/W2733005606","https://openalex.org/W2754973620","https://openalex.org/W3006934256","https://openalex.org/W3015947796","https://openalex.org/W3033063901","https://openalex.org/W3039427525","https://openalex.org/W3099871312","https://openalex.org/W3134703406","https://openalex.org/W3167237942","https://openalex.org/W3185952280","https://openalex.org/W4285079178","https://openalex.org/W4312833784","https://openalex.org/W4313291353","https://openalex.org/W4360605725","https://openalex.org/W4376134031","https://openalex.org/W4390587691","https://openalex.org/W4392745879"],"related_works":["https://openalex.org/W2143400404","https://openalex.org/W2807138148","https://openalex.org/W2801267388","https://openalex.org/W2109360204","https://openalex.org/W1869904472","https://openalex.org/W3103819855","https://openalex.org/W2086322904","https://openalex.org/W4225327811","https://openalex.org/W3217007046","https://openalex.org/W2104937488"],"abstract_inverted_index":{"Gain-cell":[0],"embedded":[1,14],"dynamic":[2],"random":[3],"access":[4],"memory":[5,15,56,96],"(GC-eDRAM)":[6],"has":[7],"emerged":[8],"as":[9,107],"a":[10,32,68,81,101,110,116,126],"suitable":[11],"choice":[12],"for":[13,50,78],"implementation":[16],"due":[17],"to":[18,60,88],"its":[19],"high":[20],"density,":[21],"low":[22],"leakage":[23],"current,":[24],"and":[25,45,66,105,121],"voltage":[26,42,83],"scaling":[27],"compatibility.":[28],"This":[29],"work":[30],"presents":[31],"16-kB":[33],"3T-1C":[34],"GC-eDRAM":[35,134],"macro,":[36],"featuring":[37],"an":[38,46],"innovative":[39],"internal":[40,51],"reference":[41,64],"generation":[43,65],"mechanism":[44],"on-chip":[47,73],"dc\u2013dc":[48,74],"converter":[49,75],"boosted":[52,82,119],"supply":[53],"generation.":[54],"The":[55,72,95],"architecture":[57],"is":[58,76],"partitioned":[59],"efficiently":[61],"accommodate":[62],"the":[63,90],"implement":[67],"variation-tolerant":[69],"sensing":[70],"scheme.":[71],"employed":[77],"internally":[79],"generating":[80],"that":[84],"enhances":[85],"charge":[86],"retention":[87,92],"increase":[89],"data":[91],"time":[93],"(DRT).":[94],"macro":[97],"was":[98],"implemented":[99],"in":[100,129],"65-nm":[102],"CMOS":[103],"technology":[104],"fabricated":[106],"part":[108],"of":[109,118],"research":[111],"test":[112],"chip.":[113],"Measurements":[114],"across":[115],"spectrum":[117],"voltages":[120],"different":[122],"temperature":[123],"points,":[124],"show":[125],"significant":[127],"improvement":[128],"DRT":[130],"compared":[131],"with":[132],"similar":[133],"designs,":[135],"without":[136],"compromising":[137],"area,":[138],"performance,":[139],"or":[140],"power":[141],"dissipation.":[142]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":2}],"updated_date":"2026-05-30T09:04:40.226872","created_date":"2024-11-23T00:00:00"}
