{"id":"https://openalex.org/W4404179547","doi":"https://doi.org/10.1109/jssc.2024.3487756","title":"Dual-Input Stacked Inverter-Based Single-Ended DRAM Sense Amplifier Using BL Switches for Low-Power High-Speed Sensing","display_name":"Dual-Input Stacked Inverter-Based Single-Ended DRAM Sense Amplifier Using BL Switches for Low-Power High-Speed Sensing","publication_year":2024,"publication_date":"2024-11-08","ids":{"openalex":"https://openalex.org/W4404179547","doi":"https://doi.org/10.1109/jssc.2024.3487756"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2024.3487756","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2024.3487756","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002578797","display_name":"Sehee Lim","orcid":"https://orcid.org/0000-0003-4772-2695"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sehee Lim","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-4772-2695","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082265623","display_name":"In-Jun Jung","orcid":"https://orcid.org/0000-0002-3228-3725"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"In Jun Jung","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-3228-3725","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5115529105","display_name":"Kyung Phil Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Gi Seok Kim","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-4699-1239","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047969005","display_name":"Dong Han Ko","orcid":"https://orcid.org/0000-0002-9028-4603"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dong Han Ko","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-9028-4603","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100726740","display_name":"Sumin Lee","orcid":"https://orcid.org/0000-0001-6782-7457"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sumin Lee","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0001-6782-7457","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"last","author":{"id":null,"display_name":"Seong-Ook Jung","orcid":"https://orcid.org/0000-0003-0757-2581"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seong-Ook Jung","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-0757-2581","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3256,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.55563234,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":96},"biblio":{"volume":"60","issue":"6","first_page":"2096","last_page":"2105"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.98580002784729,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/sense-amplifier","display_name":"Sense amplifier","score":0.8098773956298828},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.7203511595726013},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.6312513947486877},{"id":"https://openalex.org/keywords/dual","display_name":"Dual (grammatical number)","score":0.6086610555648804},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5528622269630432},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.5512819290161133},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4893884062767029},{"id":"https://openalex.org/keywords/sense","display_name":"Sense (electronics)","score":0.473127543926239},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4661610722541809},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45279112458229065},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2635873854160309},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2543109059333801},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.18180161714553833},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11274397373199463},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.07738873362541199},{"id":"https://openalex.org/keywords/art","display_name":"Art","score":0.05214187502861023}],"concepts":[{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.8098773956298828},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.7203511595726013},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.6312513947486877},{"id":"https://openalex.org/C2780980858","wikidata":"https://www.wikidata.org/wiki/Q110022","display_name":"Dual (grammatical number)","level":2,"score":0.6086610555648804},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5528622269630432},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.5512819290161133},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4893884062767029},{"id":"https://openalex.org/C143141573","wikidata":"https://www.wikidata.org/wiki/Q7450971","display_name":"Sense (electronics)","level":2,"score":0.473127543926239},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4661610722541809},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45279112458229065},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2635873854160309},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2543109059333801},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.18180161714553833},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11274397373199463},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.07738873362541199},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.05214187502861023},{"id":"https://openalex.org/C124952713","wikidata":"https://www.wikidata.org/wiki/Q8242","display_name":"Literature","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2024.3487756","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2024.3487756","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8799999952316284}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1532031741","https://openalex.org/W1979976610","https://openalex.org/W2096973557","https://openalex.org/W2135965542","https://openalex.org/W2167807744","https://openalex.org/W2330145754","https://openalex.org/W2460672600","https://openalex.org/W2583229872","https://openalex.org/W2796440220","https://openalex.org/W2799613139","https://openalex.org/W2955838247","https://openalex.org/W3003352156","https://openalex.org/W3006717577","https://openalex.org/W3033898041","https://openalex.org/W4214541424","https://openalex.org/W4220771778","https://openalex.org/W4286571716","https://openalex.org/W4366668142"],"related_works":["https://openalex.org/W2154176871","https://openalex.org/W1607126780","https://openalex.org/W2029990318","https://openalex.org/W2601845499","https://openalex.org/W2117344730","https://openalex.org/W4401211593","https://openalex.org/W4231592364","https://openalex.org/W2900372418","https://openalex.org/W2125441476","https://openalex.org/W2261845001"],"abstract_inverted_index":{"Dynamic":[0],"random":[1],"access":[2],"memory":[3],"(DRAM)":[4],"sensing":[5,96,124,151,193,215,223],"capabilities":[6],"have":[7,66],"deteriorated":[8],"with":[9,126],"the":[10,18,48,53,57,62,77,105,143,161,166,171,178,191,199,202,213,221],"reduced":[11,127],"supply":[12],"voltage":[13],"and":[14,94,132,149,185,220],"cell":[15],"capacitance":[16],"as":[17],"DRAM":[19,108],"process":[20],"scales":[21],"down.":[22],"Previous":[23],"bitline":[24],"sense":[25,118],"amplifiers":[26],"(BLSAs)":[27],"use":[28,172],"offset-canceling":[29,64],"(OC)":[30],"techniques":[31,42,65],"based":[32],"on":[33,201],"capacitive":[34],"coupling":[35],"or":[36],"current":[37,145],"mirrors.":[38],"However,":[39],"these":[40],"OC":[41,49,148],"induce":[43],"substantial":[44],"static":[45,144],"power":[46],"during":[47,146],"phase":[50],"due":[51,85],"to":[52,67,86,91,121,165,190,198],"transistors":[54],"operating":[55],"in":[56,72,139,177,206],"saturation":[58],"region.":[59],"In":[60,157],"addition,":[61,158],"previous":[63,78,167],"precede":[68],"charge":[69,186],"sharing,":[70],"resulting":[71],"additional":[73],"timing":[74],"overhead.":[75],"Furthermore,":[76],"BLSAs":[79,168],"suffer":[80],"from":[81,101],"a":[82,113,174,207],"large":[83],"area":[84,163],"two":[87],"capacitors,":[88],"high":[89,133],"sensitivity":[90],"ambient":[92],"noise,":[93],"imbalanced":[95],"problems,":[97],"which":[98],"impedes":[99],"them":[100],"being":[102],"utilized":[103],"for":[104],"highly":[106],"scaled":[107],"process.":[109],"This":[110],"article":[111],"proposes":[112],"dual-input":[114,136],"stacked":[115,137],"inverter-based":[116],"single-ended":[117,179],"amplifier":[119],"(DISA)":[120],"achieve":[122],"improved":[123],"capability":[125],"energy":[128,224],"consumption,":[129],"small":[130],"area,":[131],"speed.":[134],"The":[135,181],"inverter":[138,155],"DISA":[140,159,211],"significantly":[141],"reduces":[142],"both":[147],"main":[150],"phases":[152],"while":[153],"improving":[154],"gain.":[156],"achieves":[160,212],"smallest":[162],"compared":[164],"because":[169],"of":[170,173,195,217,225],"single":[175],"capacitor":[176],"structure.":[180],"simultaneous":[182],"offset":[183],"canceling":[184],"sharing":[187],"also":[188],"contribute":[189],"fast":[192],"operation":[194],"DISA.":[196],"According":[197],"measurement":[200],"experimental":[203],"chip":[204],"fabricated":[205],"28-nm":[208],"CMOS":[209],"technology,":[210],"shortest":[214],"time":[216],"<9":[218],"ns":[219],"lowest":[222],"5.8":[226],"fJ/cycle/bit":[227],"under":[228],"0.7-V":[229],"<inline-formula":[230],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[231],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[232],"<tex-math":[233],"notation=\"LaTeX\">$V_{\\text":[234],"{DD}}$":[235],"</tex-math></inline-formula>.":[236]},"counts_by_year":[{"year":2025,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
