{"id":"https://openalex.org/W4404179377","doi":"https://doi.org/10.1109/jssc.2024.3482567","title":"A 12-GS/s 12-b 4\u00d7 Time-Interleaved ADC Using Input-Independent Timing Skew Calibration With Global Dither Injection and Linearized Input Buffer","display_name":"A 12-GS/s 12-b 4\u00d7 Time-Interleaved ADC Using Input-Independent Timing Skew Calibration With Global Dither Injection and Linearized Input Buffer","publication_year":2024,"publication_date":"2024-11-08","ids":{"openalex":"https://openalex.org/W4404179377","doi":"https://doi.org/10.1109/jssc.2024.3482567"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2024.3482567","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2024.3482567","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028059173","display_name":"Yuefeng Cao","orcid":"https://orcid.org/0000-0003-1000-9079"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Yuefeng Cao","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, University of Macau, Macau, China"],"raw_orcid":"https://orcid.org/0000-0003-1000-9079","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Minglei Zhang","orcid":"https://orcid.org/0000-0001-7220-0464"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Minglei Zhang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, University of Macau, Macau, China"],"raw_orcid":"https://orcid.org/0000-0001-7220-0464","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071933088","display_name":"Yan Zhu","orcid":"https://orcid.org/0000-0002-8298-3244"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Yan Zhu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, University of Macau, Macau, China"],"raw_orcid":"https://orcid.org/0000-0002-8298-3244","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5106943352","display_name":"Rui P. Martins","orcid":"https://orcid.org/0000-0003-2821-648X"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Rui P. Martins","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, University of Macau, Macau, China"],"raw_orcid":"https://orcid.org/0000-0003-2821-648X","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035229843","display_name":"Chi\u2010Hang Chan","orcid":"https://orcid.org/0000-0002-7635-1101"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Chi-Hang Chan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, University of Macau, Macau, China"],"raw_orcid":"https://orcid.org/0000-0002-7635-1101","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I204512498"],"apc_list":null,"apc_paid":null,"fwci":2.0668,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.86696189,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"59","issue":"12","first_page":"4211","last_page":"4224"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9886999726295471,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.8213776350021362},{"id":"https://openalex.org/keywords/dither","display_name":"Dither","score":0.8176047801971436},{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.5655771493911743},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.535521388053894},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.4304281175136566},{"id":"https://openalex.org/keywords/buffer","display_name":"Buffer (optical fiber)","score":0.4176648259162903},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3483056426048279},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.31522953510284424},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10927662253379822},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09091624617576599},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08619189262390137}],"concepts":[{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.8213776350021362},{"id":"https://openalex.org/C70451592","wikidata":"https://www.wikidata.org/wiki/Q376493","display_name":"Dither","level":3,"score":0.8176047801971436},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.5655771493911743},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.535521388053894},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.4304281175136566},{"id":"https://openalex.org/C145018004","wikidata":"https://www.wikidata.org/wiki/Q4985944","display_name":"Buffer (optical fiber)","level":2,"score":0.4176648259162903},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3483056426048279},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.31522953510284424},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10927662253379822},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09091624617576599},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08619189262390137},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2024.3482567","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2024.3482567","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1296667907","display_name":null,"funder_award_id":"62090043","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G8307362853","display_name":null,"funder_award_id":"MYRG-GRG2023-00100-IME","funder_id":"https://openalex.org/F4320325599","funder_display_name":"University of Science and Technology of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320325599","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":36,"referenced_works":["https://openalex.org/W1968315717","https://openalex.org/W1979509961","https://openalex.org/W1981215785","https://openalex.org/W2015794844","https://openalex.org/W2073537459","https://openalex.org/W2082486400","https://openalex.org/W2093123829","https://openalex.org/W2113142084","https://openalex.org/W2113333016","https://openalex.org/W2137219772","https://openalex.org/W2137513532","https://openalex.org/W2344800364","https://openalex.org/W2547840869","https://openalex.org/W2738300304","https://openalex.org/W2744161513","https://openalex.org/W2768008485","https://openalex.org/W2792962047","https://openalex.org/W2809151566","https://openalex.org/W2947289897","https://openalex.org/W3090442715","https://openalex.org/W3130882026","https://openalex.org/W3159537255","https://openalex.org/W3169356098","https://openalex.org/W3201893035","https://openalex.org/W4286571821","https://openalex.org/W4312036228","https://openalex.org/W4360605377","https://openalex.org/W4360605453","https://openalex.org/W4360606251","https://openalex.org/W4376150529","https://openalex.org/W4386038325","https://openalex.org/W4386432168","https://openalex.org/W4387411165","https://openalex.org/W4390421986","https://openalex.org/W4392746154","https://openalex.org/W4399619809"],"related_works":["https://openalex.org/W2389128124","https://openalex.org/W2364812720","https://openalex.org/W2138725603","https://openalex.org/W1984486060","https://openalex.org/W2050335563","https://openalex.org/W3001913892","https://openalex.org/W2273639645","https://openalex.org/W2050646564","https://openalex.org/W2536702343","https://openalex.org/W1507581877"],"abstract_inverted_index":{"This":[0,80],"article":[1],"presents":[2],"a":[3,21,101,131,141,145,161,165,169,178,189],"12-GS/s":[4],"12-bit":[5,120],"<inline-formula":[6,150],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[7,151],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[8,152],"<tex-math":[9,153],"notation=\"LaTeX\">$4{\\times":[10,154],"}$":[11,155],"</tex-math></inline-formula>":[12],"time-interleaved":[13,158],"(TI)":[14],"pipelined":[15],"analog-to-digital":[16],"converter":[17],"(ADC),":[18],"which":[19,139],"utilizes":[20],"global":[22],"dither":[23,61,73],"injection":[24,62],"(GDI)":[25],"scheme":[26,37],"to":[27,124],"facilitate":[28],"an":[29],"input-independent":[30],"background":[31],"timing":[32],"skew":[33],"calibration.":[34],"The":[35,157],"GDI":[36],"adds":[38],"dithers":[39],"into":[40,177],"the":[41,45,51,66,69,85,88,91,95,116,119],"input":[42,52,70,171],"signal":[43,71],"of":[44,87,118,149,181,184,192],"push-pull":[46],"source":[47],"follower":[48],"(PP-SF)":[49],"in":[50,58,127],"buffer":[53],"(IBF),":[54],"avoiding":[55],"undetectable":[56],"skews":[57],"conventional":[59],"local":[60],"(LDI)":[63],"schemes.":[64],"Meanwhile,":[65],"perturbations":[67],"between":[68],"and":[72,164,188],"are":[74],"mitigated":[75],"by":[76,100],"cross-coupled":[77],"capacitive":[78],"networks.":[79],"work":[81],"also":[82],"significantly":[83],"improves":[84],"efficiency":[86],"interleaver":[89,143],"using":[90,130],"following":[92],"techniques:":[93],"first,":[94],"PP-SF-based":[96],"IBF":[97],"is":[98,122],"linearized":[99],"self-adaptive":[102],"current":[103],"compensation":[104],"(SACC),":[105],"achieving":[106],"high":[107],"linearity":[108],"under":[109,168],"1.2-V":[110],"low":[111],"supply":[112],"voltage":[113],"headroom.":[114],"Second,":[115],"speed":[117],"channel":[121],"lifted":[123],"3":[125],"GS/s":[126],"28-nm":[128],"CMOS":[129],"sturdy":[132],"ring":[133],"amplifier":[134],"(SRingAmp)":[135],"with":[136,144,172],"feedforward":[137],"(FF),":[138],"enables":[140],"nonhierarchical":[142],"small":[146],"interleaving":[147],"factor":[148],"</tex-math></inline-formula>.":[156],"ADC":[159],"attains":[160],"54.1-dB":[162],"SNDR":[163],"66.0-dB":[166],"SFDR":[167],"near-Nyquist":[170],"179.8-mW":[173],"power":[174],"consumption,":[175],"translating":[176],"Walden":[179],"figure":[180],"merit":[182],"(FoM)":[183],"36.2":[185],"fJ/conversion":[186],"step":[187],"Schreier":[190],"FoM":[191],"159.3":[193],"dB.":[194]},"counts_by_year":[{"year":2026,"cited_by_count":5},{"year":2025,"cited_by_count":7},{"year":2024,"cited_by_count":1}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2024-11-09T00:00:00"}