{"id":"https://openalex.org/W4402673556","doi":"https://doi.org/10.1109/jssc.2024.3458463","title":"A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase Alignment","display_name":"A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase Alignment","publication_year":2024,"publication_date":"2024-09-20","ids":{"openalex":"https://openalex.org/W4402673556","doi":"https://doi.org/10.1109/jssc.2024.3458463"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2024.3458463","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2024.3458463","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100327750","display_name":"Haoran Li","orcid":"https://orcid.org/0009-0004-3833-4564"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":true,"raw_author_name":"Haoran Li","raw_affiliation_strings":["Institute of Microelectronics and the Faculty of Science and Technology&#x2014;Department of ECE, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","State Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, and the Faculty of Science and Technology&#x2014;Department of ECE, University of Macau, Macao, China"],"raw_orcid":"https://orcid.org/0009-0004-3833-4564","affiliations":[{"raw_affiliation_string":"Institute of Microelectronics and the Faculty of Science and Technology&#x2014;Department of ECE, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, and the Faculty of Science and Technology&#x2014;Department of ECE, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108575617","display_name":"Tailong Xu","orcid":null},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Tailong Xu","raw_affiliation_strings":["Institute of Microelectronics and the Faculty of Science and Technology&#x2014;Department of ECE, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","State Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, and the Faculty of Science and Technologyb Department of ECE, University of Macau, Macao, China"],"raw_orcid":"https://orcid.org/0000-0003-1672-5412","affiliations":[{"raw_affiliation_string":"Institute of Microelectronics and the Faculty of Science and Technology&#x2014;Department of ECE, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, and the Faculty of Science and Technologyb Department of ECE, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062261926","display_name":"Xi Meng","orcid":"https://orcid.org/0000-0002-2320-5012"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Xi Meng","raw_affiliation_strings":["Institute of Microelectronics and the Faculty of Science and Technology&#x2014;Department of ECE, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","State Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, and the Faculty of Science and Technology&#x2014;Department of ECE, University of Macau, Macao, China"],"raw_orcid":"https://orcid.org/0000-0002-2320-5012","affiliations":[{"raw_affiliation_string":"Institute of Microelectronics and the Faculty of Science and Technology&#x2014;Department of ECE, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, and the Faculty of Science and Technology&#x2014;Department of ECE, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006541988","display_name":"Jun Yin","orcid":"https://orcid.org/0000-0002-4195-4551"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Jun Yin","raw_affiliation_strings":["Institute of Microelectronics and the Faculty of Science and Technology&#x2014;Department of ECE, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","State Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, and the Faculty of Science and Technology&#x2014;Department of ECE, University of Macau, Macao, China"],"raw_orcid":"https://orcid.org/0000-0002-4195-4551","affiliations":[{"raw_affiliation_string":"Institute of Microelectronics and the Faculty of Science and Technology&#x2014;Department of ECE, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, and the Faculty of Science and Technology&#x2014;Department of ECE, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5106943352","display_name":"Rui P. Martins","orcid":"https://orcid.org/0000-0003-2821-648X"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Rui P. Martins","raw_affiliation_strings":["Institute of Microelectronics and the Faculty of Science and Technology&#x2014;Department of ECE, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","State Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, and the Faculty of Science and Technology&#x2014;Department of ECE, University of Macau, Macao, China"],"raw_orcid":"https://orcid.org/0000-0003-2821-648X","affiliations":[{"raw_affiliation_string":"Institute of Microelectronics and the Faculty of Science and Technology&#x2014;Department of ECE, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, and the Faculty of Science and Technology&#x2014;Department of ECE, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498","https://openalex.org/I4210119392"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058845450","display_name":"Pui\u2010In Mak","orcid":"https://orcid.org/0000-0002-3579-8740"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Pui-In Mak","raw_affiliation_strings":["Institute of Microelectronics and the Faculty of Science and Technology&#x2014;Department of ECE, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","State Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, and the Faculty of Science and Technology&#x2014;Department of ECE, University of Macau, Macao, China"],"raw_orcid":"https://orcid.org/0000-0002-3579-8740","affiliations":[{"raw_affiliation_string":"Institute of Microelectronics and the Faculty of Science and Technology&#x2014;Department of ECE, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, and the Faculty of Science and Technology&#x2014;Department of ECE, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498","https://openalex.org/I4210119392"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5100327750"],"corresponding_institution_ids":["https://openalex.org/I204512498","https://openalex.org/I4210119392"],"apc_list":null,"apc_paid":null,"fwci":2.2032,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.88218903,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":98,"max":99},"biblio":{"volume":"59","issue":"12","first_page":"3952","last_page":"3965"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9947999715805054,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8814587593078613},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.8489867448806763},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8272935748100281},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.47739118337631226},{"id":"https://openalex.org/keywords/buffer","display_name":"Buffer (optical fiber)","score":0.46646416187286377},{"id":"https://openalex.org/keywords/phase","display_name":"Phase (matter)","score":0.4308139383792877},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3259839117527008},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.29263341426849365},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12683707475662231},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.09477731585502625}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8814587593078613},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.8489867448806763},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8272935748100281},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.47739118337631226},{"id":"https://openalex.org/C145018004","wikidata":"https://www.wikidata.org/wiki/Q4985944","display_name":"Buffer (optical fiber)","level":2,"score":0.46646416187286377},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.4308139383792877},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3259839117527008},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.29263341426849365},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12683707475662231},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.09477731585502625},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2024.3458463","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2024.3458463","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.7300000190734863,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G2431699504","display_name":null,"funder_award_id":"SKLAMSV-2023-2025","funder_id":"https://openalex.org/F4320321655","funder_display_name":"Science and Technology Development Fund"},{"id":"https://openalex.org/G3029784206","display_name":null,"funder_award_id":"MYRG-GRG2024-00298-IME","funder_id":"https://openalex.org/F4320333714","funder_display_name":"Cave Science and Technology Research Fund"},{"id":"https://openalex.org/G7891822949","display_name":null,"funder_award_id":"0026/2021/AFJ","funder_id":"https://openalex.org/F4320321655","funder_display_name":"Science and Technology Development Fund"}],"funders":[{"id":"https://openalex.org/F4320321655","display_name":"Science and Technology Development Fund","ror":"https://ror.org/044vr6g03"},{"id":"https://openalex.org/F4320333714","display_name":"Cave Science and Technology Research Fund","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W1492059061","https://openalex.org/W1544882865","https://openalex.org/W2097406868","https://openalex.org/W2121741926","https://openalex.org/W2123266073","https://openalex.org/W2124140800","https://openalex.org/W2126040583","https://openalex.org/W2131053965","https://openalex.org/W2142610168","https://openalex.org/W2170567617","https://openalex.org/W2288286056","https://openalex.org/W2316615363","https://openalex.org/W2559073178","https://openalex.org/W2790060412","https://openalex.org/W2800076889","https://openalex.org/W2899996489","https://openalex.org/W2921886179","https://openalex.org/W2921945517","https://openalex.org/W2956242243","https://openalex.org/W2971549990","https://openalex.org/W2972695498","https://openalex.org/W2990700108","https://openalex.org/W3004354595","https://openalex.org/W3015797764","https://openalex.org/W3028280451","https://openalex.org/W3033534174","https://openalex.org/W3198525795","https://openalex.org/W3198862060","https://openalex.org/W3205503863","https://openalex.org/W3213347303","https://openalex.org/W3214302083","https://openalex.org/W4220669729","https://openalex.org/W4248108322","https://openalex.org/W4293519097","https://openalex.org/W4293812167","https://openalex.org/W4310050303","https://openalex.org/W4392746218"],"related_works":["https://openalex.org/W2070109416","https://openalex.org/W1523213765","https://openalex.org/W2040399070","https://openalex.org/W2976219355","https://openalex.org/W1994021281","https://openalex.org/W2139484866","https://openalex.org/W2089131288","https://openalex.org/W1600405202","https://openalex.org/W1486070987","https://openalex.org/W3064661991"],"abstract_inverted_index":{"This":[0,120],"article":[1,121],"presents":[2],"a":[3,83,103,157,203],"type-II":[4],"sub-sampling":[5],"phase-locked":[6],"loop":[7,80,108],"(SSPLL)":[8],"that":[9],"achieves":[10,164],"low":[11,13],"jitter,":[12],"spur,":[14],"and":[15,40,52,130,163,182,186,197],"sub-<inline-formula":[16],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[17],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[18],"<tex-math":[19],"notation=\"LaTeX\">$\\mu":[20],"$":[21],"</tex-math></inline-formula>s":[22],"locking":[23,92,200],"time":[24,93,201],"when":[25],"synthesizing":[26],"millimeter-wave":[27],"(mm-wave)":[28],"frequencies.":[29],"The":[30,75,99,190],"proposed":[31,76,148],"function-reused":[32],"(FR)":[33],"voltage-controlled":[34],"oscillator":[35],"(VCO)-buffer":[36],"eliminates":[37,62],"the":[38,44,47,50,57,63,68,72,88,91,95,112,116,124,127,131,137,143,147,154,198],"noise":[39,133],"capacitive":[41],"loading":[42],"from":[43,206],"transistors":[45],"in":[46,67,151],"buffer,":[48,70],"improving":[49],"jitter":[51,167],"reference":[53],"(ref.)":[54],"spur":[55,129,193],"of":[56,90,115,126,146,160,168,184],"SSPLL":[58,155],"simultaneously.":[59],"It":[60],"also":[61,101,122],"inductor":[64],"typically":[65],"employed":[66],"high-frequency":[69],"reducing":[71],"chip":[73],"area.":[74],"low-power":[77],"fast":[78],"frequency-locked":[79],"(FLL)":[81],"utilizes":[82],"phase":[84,97,132],"aligner":[85],"to":[86,179,208],"decouple":[87],"dependency":[89],"on":[94],"initial":[96],"error.":[98],"FLL":[100],"employs":[102],"coarse-fine-time-to-digital":[104],"converter":[105],"(TDC)-based":[106],"type-I":[107],"for":[109],"promptly":[110],"searching":[111],"control":[113],"word":[114],"switched":[117],"capacitors":[118],"(SCs).":[119],"details":[123],"analysis":[125],"ref.":[128,192,214],"(PN)":[134],"performance":[135],"using":[136],"FR":[138],"VCO-buffer":[139],"as":[140,142],"well":[141],"design":[144],"considerations":[145],"FLL.":[149],"Fabricated":[150],"28-nm":[152],"CMOS,":[153],"occupies":[156],"compact":[158],"area":[159],"0.065":[161],"mm2":[162],"an":[165],"rms":[166],"48.3":[169],"fs":[170],"at":[171,202],"26":[172],"GHz":[173,210],"while":[174],"consuming":[175],"19.1":[176],"mW,":[177],"corresponding":[178],"excellent":[180],"FoMJ":[181],"FoMN":[183],"\u2212253.5":[185],"\u2212277.6":[187],"dB,":[188],"respectively.":[189],"measured":[191,199],"is":[194,211],"\u221266":[195],"dBc,":[196],"frequency":[204],"jump":[205],"0.4":[207],"2.8":[209],"within":[212],"55":[213],"cycles.":[215]},"counts_by_year":[{"year":2025,"cited_by_count":11}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}