{"id":"https://openalex.org/W4394711750","doi":"https://doi.org/10.1109/jssc.2024.3383605","title":"A Multireference PLL: Theory and Implementation","display_name":"A Multireference PLL: Theory and Implementation","publication_year":2024,"publication_date":"2024-04-11","ids":{"openalex":"https://openalex.org/W4394711750","doi":"https://doi.org/10.1109/jssc.2024.3383605"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2024.3383605","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2024.3383605","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5001001680","display_name":"Hongzhuo Liu","orcid":"https://orcid.org/0009-0001-2180-2606"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Hongzhuo Liu","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University, Beijing, China"],"raw_orcid":"https://orcid.org/0009-0001-2180-2606","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074494245","display_name":"Wei Deng","orcid":"https://orcid.org/0000-0002-6323-4539"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wei Deng","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0002-6323-4539","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086243413","display_name":"Haikun Jia","orcid":"https://orcid.org/0000-0003-4564-8938"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Haikun Jia","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0003-4564-8938","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100449699","display_name":"Shiwei Zhang","orcid":"https://orcid.org/0000-0002-7663-1912"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shiwei Zhang","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019936693","display_name":"Shiyan Sun","orcid":"https://orcid.org/0000-0001-9500-0967"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shiyan Sun","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100356864","display_name":"Zhihua Wang","orcid":"https://orcid.org/0000-0001-6567-0759"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhihua Wang","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0001-6567-0759","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052727227","display_name":"Baoyong Chi","orcid":"https://orcid.org/0000-0003-4399-4423"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Baoyong Chi","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0003-4399-4423","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5001001680"],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":3.0043,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.91517302,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":"59","issue":"7","first_page":"1981","last_page":"1994"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9362000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9362000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9358000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.38778066635131836}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.38778066635131836}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2024.3383605","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2024.3383605","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":43,"referenced_works":["https://openalex.org/W1966187371","https://openalex.org/W2048289646","https://openalex.org/W2082211203","https://openalex.org/W2116875943","https://openalex.org/W2128239136","https://openalex.org/W2326419276","https://openalex.org/W2588789014","https://openalex.org/W2791440917","https://openalex.org/W2899938501","https://openalex.org/W2913416661","https://openalex.org/W2921503264","https://openalex.org/W2921886179","https://openalex.org/W2921945517","https://openalex.org/W2990700108","https://openalex.org/W3132889034","https://openalex.org/W3134319786","https://openalex.org/W3135554245","https://openalex.org/W3135783513","https://openalex.org/W3176167732","https://openalex.org/W3184201630","https://openalex.org/W3198525795","https://openalex.org/W3198862060","https://openalex.org/W3214302083","https://openalex.org/W4214735590","https://openalex.org/W4220803856","https://openalex.org/W4220825384","https://openalex.org/W4220900376","https://openalex.org/W4220957393","https://openalex.org/W4221115129","https://openalex.org/W4226257562","https://openalex.org/W4280524069","https://openalex.org/W4308089742","https://openalex.org/W4308089895","https://openalex.org/W4312261872","https://openalex.org/W4319996415","https://openalex.org/W4360605445","https://openalex.org/W4360605449","https://openalex.org/W4360605531","https://openalex.org/W4360605720","https://openalex.org/W4367146868","https://openalex.org/W4376133983","https://openalex.org/W4387411297","https://openalex.org/W4389880390"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W2382290278","https://openalex.org/W2478288626","https://openalex.org/W4391913857","https://openalex.org/W2350741829"],"abstract_inverted_index":{"The":[0,49,98],"limitation":[1],"of":[2,65,94,100],"reference":[3,42,47,66,70,87,96],"phase":[4],"noise":[5,52],"(PN)":[6],"causes":[7],"problems":[8],"for":[9],"the":[10,38,62,69,73,82,86,92,95,101],"very":[11],"low-jitter":[12],"phase-locked":[13],"loops":[14],"(PLLs),":[15],"which":[16],"is":[17,68,103],"increasingly":[18],"critical":[19],"and":[20,55,81,110],"may":[21],"be":[22],"an":[23],"impediment":[24],"toward":[25],"10":[26],"fs":[27,113],"jitter.":[28,114],"This":[29],"article":[30],"presents":[31],"a":[32,76,106],"multireference":[33],"PLL":[34],"(MRPLL)":[35],"architecture":[36,50],"featuring":[37],"ability":[39],"to":[40],"reduce":[41,91],"PN":[43,67,93],"by":[44],"using":[45],"more":[46],"clocks.":[48],"evolution,":[51],"model":[53],"analysis,":[54],"circuit":[56],"design":[57],"considerations":[58],"are":[59],"presented.":[60],"Theoretically,":[61],"major":[63],"contributor":[64],"buffer,":[71],"including":[72],"buffer":[74,83],"inside":[75],"packaged":[77],"crystal":[78],"oscillator":[79],"(XO)":[80],"on-chip.":[84],"Increasing":[85],"frequency":[88],"can":[89],"significantly":[90],"buffer.":[97],"prototype":[99],"MRPLL":[102],"implemented":[104],"in":[105],"65-nm":[107],"CMOS":[108],"process":[109],"achieves":[111],"16.1":[112]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":10},{"year":2024,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
