{"id":"https://openalex.org/W4310054369","doi":"https://doi.org/10.1109/jssc.2022.3208510","title":"A Fully Integrated 160-Gb/s D-Band Transmitter Achieving 1.1-pJ/b Efficiency in 22-nm FinFET","display_name":"A Fully Integrated 160-Gb/s D-Band Transmitter Achieving 1.1-pJ/b Efficiency in 22-nm FinFET","publication_year":2022,"publication_date":"2022-10-05","ids":{"openalex":"https://openalex.org/W4310054369","doi":"https://doi.org/10.1109/jssc.2022.3208510"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2022.3208510","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2022.3208510","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5059114871","display_name":"Steven Callender","orcid":"https://orcid.org/0000-0002-8121-673X"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Steven Callender","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0002-8121-673X","affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066915898","display_name":"Abhishek Agrawal","orcid":"https://orcid.org/0000-0002-7882-1461"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Abhishek Agrawal","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0002-7882-1461","affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074486260","display_name":"Amy Whitcombe","orcid":"https://orcid.org/0000-0002-7188-7628"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Amy Whitcombe","raw_affiliation_strings":["Intel Corporation, Santa Clara, CA, USA"],"raw_orcid":"https://orcid.org/0000-0002-7188-7628","affiliations":[{"raw_affiliation_string":"Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051556159","display_name":"Ritesh Bhat","orcid":"https://orcid.org/0000-0002-0505-9736"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ritesh Bhat","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0002-0505-9736","affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101931511","display_name":"Mustafijur Rahman","orcid":"https://orcid.org/0000-0003-0477-8154"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Mustafijur Rahman","raw_affiliation_strings":["IIT Delhi, New Delhi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IIT Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078480262","display_name":"Chun C. Lee","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chun C. Lee","raw_affiliation_strings":["GaN Systems, Richardson, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"GaN Systems, Richardson, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005509548","display_name":"Peter Sagazio","orcid":"https://orcid.org/0000-0001-7335-5337"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Peter Sagazio","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001486682","display_name":"Georgios C. Dogiamis","orcid":"https://orcid.org/0000-0002-4776-0491"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Georgios C. Dogiamis","raw_affiliation_strings":["Intel Corporation, Chandler, AZ, USA"],"raw_orcid":"https://orcid.org/0000-0002-4776-0491","affiliations":[{"raw_affiliation_string":"Intel Corporation, Chandler, AZ, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059381050","display_name":"Brent Carlton","orcid":"https://orcid.org/0000-0003-4542-4715"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Brent R. Carlton","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0003-4542-4715","affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087348289","display_name":"Christopher Hull","orcid":"https://orcid.org/0000-0002-8479-2062"},"institutions":[{"id":"https://openalex.org/I1311688040","display_name":"Amazon (United States)","ror":"https://ror.org/04mv4n011","country_code":"US","type":"company","lineage":["https://openalex.org/I1311688040"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Christopher Hull","raw_affiliation_strings":["Amazon.com Inc., Redmond, WA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Amazon.com Inc., Redmond, WA, USA","institution_ids":["https://openalex.org/I1311688040"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065695022","display_name":"Stefano Pellerano","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Stefano Pellerano","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":11,"corresponding_author_ids":["https://openalex.org/A5059114871"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":2.1245,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.87448553,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"57","issue":"12","first_page":"3582","last_page":"3598"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transmitter","display_name":"Transmitter","score":0.6012158393859863},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.5548304319381714},{"id":"https://openalex.org/keywords/pseudorandom-binary-sequence","display_name":"Pseudorandom binary sequence","score":0.5369747281074524},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.5282206535339355},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.5189597010612488},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4792183041572571},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4760605990886688},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.4697074294090271},{"id":"https://openalex.org/keywords/wideband","display_name":"Wideband","score":0.4202333688735962},{"id":"https://openalex.org/keywords/frequency-multiplier","display_name":"Frequency multiplier","score":0.4143926203250885},{"id":"https://openalex.org/keywords/quadrature-amplitude-modulation","display_name":"Quadrature amplitude modulation","score":0.4138144254684448},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.31138864159584045},{"id":"https://openalex.org/keywords/bit-error-rate","display_name":"Bit error rate","score":0.2894483804702759},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.24669939279556274},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.2296450436115265},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.18549448251724243},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.1734447181224823},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.15897831320762634},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11685410141944885}],"concepts":[{"id":"https://openalex.org/C47798520","wikidata":"https://www.wikidata.org/wiki/Q190157","display_name":"Transmitter","level":3,"score":0.6012158393859863},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.5548304319381714},{"id":"https://openalex.org/C128040838","wikidata":"https://www.wikidata.org/wiki/Q1810628","display_name":"Pseudorandom binary sequence","level":3,"score":0.5369747281074524},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.5282206535339355},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.5189597010612488},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4792183041572571},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4760605990886688},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.4697074294090271},{"id":"https://openalex.org/C2780202535","wikidata":"https://www.wikidata.org/wiki/Q4524457","display_name":"Wideband","level":2,"score":0.4202333688735962},{"id":"https://openalex.org/C146002875","wikidata":"https://www.wikidata.org/wiki/Q1074289","display_name":"Frequency multiplier","level":3,"score":0.4143926203250885},{"id":"https://openalex.org/C32409245","wikidata":"https://www.wikidata.org/wiki/Q749753","display_name":"Quadrature amplitude modulation","level":4,"score":0.4138144254684448},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31138864159584045},{"id":"https://openalex.org/C56296756","wikidata":"https://www.wikidata.org/wiki/Q840922","display_name":"Bit error rate","level":3,"score":0.2894483804702759},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.24669939279556274},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.2296450436115265},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.18549448251724243},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.1734447181224823},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.15897831320762634},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11685410141944885},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2022.3208510","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2022.3208510","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8799999952316284,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":60,"referenced_works":["https://openalex.org/W1644985135","https://openalex.org/W1648168223","https://openalex.org/W1975256196","https://openalex.org/W1983134786","https://openalex.org/W2012967215","https://openalex.org/W2089032101","https://openalex.org/W2103745509","https://openalex.org/W2128335437","https://openalex.org/W2131053965","https://openalex.org/W2144253779","https://openalex.org/W2160966443","https://openalex.org/W2172029744","https://openalex.org/W2277972258","https://openalex.org/W2516199239","https://openalex.org/W2533904379","https://openalex.org/W2592973697","https://openalex.org/W2625708510","https://openalex.org/W2741028034","https://openalex.org/W2775509532","https://openalex.org/W2793607050","https://openalex.org/W2807025533","https://openalex.org/W2807122255","https://openalex.org/W2897737610","https://openalex.org/W2903531964","https://openalex.org/W2910087247","https://openalex.org/W2911301660","https://openalex.org/W2914643564","https://openalex.org/W2918826880","https://openalex.org/W2920828572","https://openalex.org/W2921066967","https://openalex.org/W2921596758","https://openalex.org/W2945544525","https://openalex.org/W2959445744","https://openalex.org/W2970628702","https://openalex.org/W2980769293","https://openalex.org/W2981823839","https://openalex.org/W3015587302","https://openalex.org/W3020154269","https://openalex.org/W3081194669","https://openalex.org/W3092161863","https://openalex.org/W3107630472","https://openalex.org/W3120105741","https://openalex.org/W3132736789","https://openalex.org/W3134828206","https://openalex.org/W3161542228","https://openalex.org/W3184154709","https://openalex.org/W3184810840","https://openalex.org/W3194275199","https://openalex.org/W3208435358","https://openalex.org/W4212975015","https://openalex.org/W4220787334","https://openalex.org/W6734601217","https://openalex.org/W6749315543","https://openalex.org/W6759612735","https://openalex.org/W6760244489","https://openalex.org/W6791164808","https://openalex.org/W6791415803","https://openalex.org/W6802400472","https://openalex.org/W6809586440","https://openalex.org/W7057383043"],"related_works":["https://openalex.org/W4323268213","https://openalex.org/W2101047079","https://openalex.org/W4242128654","https://openalex.org/W2152549830","https://openalex.org/W1993744883","https://openalex.org/W3197720232","https://openalex.org/W2388387398","https://openalex.org/W3203996584","https://openalex.org/W2131180609","https://openalex.org/W1975133264"],"abstract_inverted_index":{"This":[0],"work":[1],"presents":[2],"a":[3,10,28,47],"fully":[4],"integrated":[5,45],"140-GHz":[6],"transmitter":[7],"(TX)":[8],"achieving":[9],"data":[11,72],"rate":[12],"of":[13,92],"160":[14],"Gb/s":[15],"with":[16,38,46,82],"~1-pJ/b":[17],"efficiency":[18],"in":[19],"the":[20],"22-nm":[21],"Intel":[22],"FinFET":[23],"technology.":[24],"The":[25,74],"TX":[26,75],"leverages":[27],"wideband":[29,59],"radio":[30],"frequency":[31,53],"digital":[32],"to":[33],"analog":[34],"converter":[35],"(RF-DAC)":[36],"architecture":[37],"embedded":[39],"4:1":[40],"multiplexer,":[41],"and":[42,64],"it":[43],"is":[44],"sub-sampling":[48],"quadrature":[49],"phase-locked":[50],"loop":[51],"(PLL),":[52],"tripler,":[54],"local":[55],"oscillator":[56],"(LO)":[57],"buffers,":[58],"two-stage":[60],"power":[61,91],"amplifier":[62],"(PA),":[63],"on-chip":[65],"SRAM/pseudorandom":[66],"binary":[67],"sequence":[68],"(PRBS)":[69],"for":[70],"high-speed":[71],"generation.":[73],"achieves":[76],"120/160-Gb/s":[77],"16":[78],"quadratic-amplitude":[79],"modulation":[80],"(QAM)":[81],"\u221219/\u221217-dB":[83],"error":[84],"vector":[85],"magnitude":[86],"(EVM)":[87],"at":[88],"an":[89],"output":[90],"+1.5/+0.8":[93],"dBm.":[94]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":11},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}