{"id":"https://openalex.org/W4291653258","doi":"https://doi.org/10.1109/jssc.2022.3196924","title":"A 10-GS/s 8-bit 2850-\u03bcm<sup>2</sup> Two-Step Time-Domain ADC With Speed and Efficiency Enhanced by the Delay-Tracking Pipelined-SAR TDC","display_name":"A 10-GS/s 8-bit 2850-\u03bcm<sup>2</sup> Two-Step Time-Domain ADC With Speed and Efficiency Enhanced by the Delay-Tracking Pipelined-SAR TDC","publication_year":2022,"publication_date":"2022-08-15","ids":{"openalex":"https://openalex.org/W4291653258","doi":"https://doi.org/10.1109/jssc.2022.3196924"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2022.3196924","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2022.3196924","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017397256","display_name":"Juzheng Liu","orcid":"https://orcid.org/0000-0003-1963-6415"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Juzheng Liu","raw_affiliation_strings":["Department of Electrical Engineering, University of Southern California, Los Angeles, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Southern California, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073098029","display_name":"Mohsen Hassanpourghadi","orcid":"https://orcid.org/0000-0001-6410-2864"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mohsen Hassanpourghadi","raw_affiliation_strings":["Department of Electrical Engineering, University of Southern California, Los Angeles, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Southern California, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091748833","display_name":"Mike Shuo\u2010Wei Chen","orcid":"https://orcid.org/0000-0001-7033-272X"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mike Shuo-Wei Chen","raw_affiliation_strings":["Department of Electrical Engineering, University of Southern California, Los Angeles, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Southern California, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I1174212"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5017397256"],"corresponding_institution_ids":["https://openalex.org/I1174212"],"apc_list":null,"apc_paid":null,"fwci":2.6693,"has_fulltext":false,"cited_by_count":30,"citation_normalized_percentile":{"value":0.90375522,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"57","issue":"12","first_page":"3757","last_page":"3767"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.8899186849594116},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.6805005073547363},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.6523175239562988},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5548975467681885},{"id":"https://openalex.org/keywords/dynamic-range","display_name":"Dynamic range","score":0.5103003978729248},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4972422420978546},{"id":"https://openalex.org/keywords/figure-of-merit","display_name":"Figure of merit","score":0.48228028416633606},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45345306396484375},{"id":"https://openalex.org/keywords/shaping","display_name":"Shaping","score":0.44420310854911804},{"id":"https://openalex.org/keywords/quantization","display_name":"Quantization (signal processing)","score":0.4259741008281708},{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.4228881597518921},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.2743403911590576},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.23112425208091736},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.20975202322006226},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14774563908576965},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10518333315849304},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.09518802165985107}],"concepts":[{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.8899186849594116},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.6805005073547363},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.6523175239562988},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5548975467681885},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.5103003978729248},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4972422420978546},{"id":"https://openalex.org/C130277099","wikidata":"https://www.wikidata.org/wiki/Q3676605","display_name":"Figure of merit","level":2,"score":0.48228028416633606},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45345306396484375},{"id":"https://openalex.org/C142311740","wikidata":"https://www.wikidata.org/wiki/Q1066177","display_name":"Shaping","level":2,"score":0.44420310854911804},{"id":"https://openalex.org/C28855332","wikidata":"https://www.wikidata.org/wiki/Q198099","display_name":"Quantization (signal processing)","level":2,"score":0.4259741008281708},{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.4228881597518921},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.2743403911590576},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.23112425208091736},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.20975202322006226},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14774563908576965},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10518333315849304},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.09518802165985107},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2022.3196924","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2022.3196924","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8100000023841858,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W2064962291","https://openalex.org/W2076110738","https://openalex.org/W2108324407","https://openalex.org/W2134713152","https://openalex.org/W2151832744","https://openalex.org/W2592547566","https://openalex.org/W2772200284","https://openalex.org/W2802993124","https://openalex.org/W2895383535","https://openalex.org/W2901452097","https://openalex.org/W2906404755","https://openalex.org/W2907232526","https://openalex.org/W2952889434","https://openalex.org/W2964671960","https://openalex.org/W2964782680","https://openalex.org/W2975781870","https://openalex.org/W2976506721","https://openalex.org/W3000059814","https://openalex.org/W3008773704","https://openalex.org/W3015709350","https://openalex.org/W3048442933","https://openalex.org/W3082320727","https://openalex.org/W3132180131","https://openalex.org/W6734095656","https://openalex.org/W6766670862","https://openalex.org/W6776497280"],"related_works":["https://openalex.org/W2759515872","https://openalex.org/W2783221760","https://openalex.org/W2904640696","https://openalex.org/W2341231357","https://openalex.org/W2054018984","https://openalex.org/W2207354743","https://openalex.org/W4206356469","https://openalex.org/W2511822798","https://openalex.org/W2942561789","https://openalex.org/W2542593952"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"an":[3,130],"8-bit":[4],"time-domain":[5],"analog-to-digital":[6],"converter":[7,25],"(ADC)":[8],"achieving":[9],"ten-GS/s":[10],"conversion":[11],"speed":[12],"with":[13,35,129],"only":[14,134],"two":[15],"time-interleaved":[16],"(TI)":[17],"channels.":[18],"A":[19],"successive":[20],"approximation":[21],"register":[22],"(SAR)":[23],"time-to-digital":[24],"(TDC)":[26],"is":[27,48,74],"implemented":[28],"for":[29,70,84],"the":[30,45,63,66,71,77,94,117],"subpicosecond":[31],"resolution":[32],"time":[33,68,90],"quantization":[34],"high":[36,85],"power/area":[37],"efficiency":[38,86],"and":[39,87,105,109],"low":[40],"jitter.":[41],"The":[42],"throughput":[43],"of":[44,127,133],"SAR":[46,72],"TDC":[47,73],"enhanced":[49],"by":[50,76],"a":[51,58,102,110,123],"unique":[52],"delay-tracking":[53],"pipelining":[54],"technique":[55],"to":[56,122],"enable":[57],"5-GS/s":[59],"single-channel":[60],"conversion.":[61],"On":[62],"circuit":[64],"level,":[65],"reference":[67,89],"generation":[69],"realized":[75],"proposed":[78],"selective":[79],"delay":[80],"tuning":[81],"(SDT)":[82],"cell":[83],"small":[88],"variation.":[91],"Fabricated":[92],"in":[93],"14-nm":[95],"FinFet":[96],"CMOS":[97],"technology,":[98],"this":[99],"ADC":[100],"achieves":[101],"37.2-dB":[103],"signal-to-noise":[104],"distortion":[106],"ratio":[107],"(SNDR)":[108],"50.6-dB":[111],"spurious-free":[112],"dynamic":[113],"range":[114],"(SFDR)":[115],"at":[116],"Nyquist":[118],"input":[119],"frequency,":[120],"leading":[121],"24.8-fJ/conv-step":[124],"Walden":[125],"figure":[126],"merit":[128],"active":[131],"area":[132],"2850":[135],"<inline-formula":[136],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[137],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[138],"<tex-math":[139],"notation=\"LaTeX\">$\\mu":[140],"\\text{m}^{2}$":[141],"</tex-math></inline-formula>":[142],".":[143]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":12},{"year":2024,"cited_by_count":11},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}