{"id":"https://openalex.org/W4212787522","doi":"https://doi.org/10.1109/jssc.2022.3148174","title":"A Low-Jitter 8-GHz RO-Based ADPLL With PVT-Robust Replica-Based Analog Closed Loop for Supply Noise Compensation","display_name":"A Low-Jitter 8-GHz RO-Based ADPLL With PVT-Robust Replica-Based Analog Closed Loop for Supply Noise Compensation","publication_year":2022,"publication_date":"2022-02-16","ids":{"openalex":"https://openalex.org/W4212787522","doi":"https://doi.org/10.1109/jssc.2022.3148174"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2022.3148174","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2022.3148174","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017126528","display_name":"Hyo\u2010Jun Kim","orcid":"https://orcid.org/0000-0002-7176-576X"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyojun Kim","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-7176-576X","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059104146","display_name":"Woosong Jung","orcid":"https://orcid.org/0000-0002-7470-1630"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Woosong Jung","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-7470-1630","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017133805","display_name":"Kwandong Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I134353371","display_name":"SK Group (South Korea)","ror":"https://ror.org/03696td91","country_code":"KR","type":"company","lineage":["https://openalex.org/I134353371"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kwandong Kim","raw_affiliation_strings":["SK Hynix Inc., Icheon, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"SK Hynix Inc., Icheon, South Korea","institution_ids":["https://openalex.org/I134353371"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040605443","display_name":"Sungwoo Kim","orcid":"https://orcid.org/0000-0002-4189-7120"},"institutions":[{"id":"https://openalex.org/I134353371","display_name":"SK Group (South Korea)","ror":"https://ror.org/03696td91","country_code":"KR","type":"company","lineage":["https://openalex.org/I134353371"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungwoo Kim","raw_affiliation_strings":["SK Hynix Inc., Icheon, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-4189-7120","affiliations":[{"raw_affiliation_string":"SK Hynix Inc., Icheon, South Korea","institution_ids":["https://openalex.org/I134353371"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061470672","display_name":"Woo\u2010Seok Choi","orcid":"https://orcid.org/0000-0002-3556-8689"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Woo-Seok Choi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-3556-8689","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008010401","display_name":"Deog\u2010Kyoon Jeong","orcid":"https://orcid.org/0000-0003-0436-703X"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Deog-Kyoon Jeong","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-0436-703X","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9712,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.72804305,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":"57","issue":"6","first_page":"1712","last_page":"1722"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8540685176849365},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.5643789172172546},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5626914501190186},{"id":"https://openalex.org/keywords/replica","display_name":"Replica","score":0.5204061269760132},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.4971466362476349},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4966168999671936},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.38426682353019714},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.37387049198150635},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.34596771001815796},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.34462887048721313},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3201415538787842},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2159641981124878}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8540685176849365},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.5643789172172546},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5626914501190186},{"id":"https://openalex.org/C2775937380","wikidata":"https://www.wikidata.org/wiki/Q1232589","display_name":"Replica","level":2,"score":0.5204061269760132},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.4971466362476349},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4966168999671936},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.38426682353019714},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.37387049198150635},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.34596771001815796},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.34462887048721313},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3201415538787842},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2159641981124878},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/jssc.2022.3148174","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2022.3148174","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},{"id":"pmh:oai:s-space.snu.ac.kr:10371/184430","is_oa":false,"landing_page_url":"https://hdl.handle.net/10371/184430","pdf_url":null,"source":{"id":"https://openalex.org/S4306401345","display_name":"Seoul National University Open Repository (Seoul National University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I139264467","host_organization_name":"Seoul National University","host_organization_lineage":["https://openalex.org/I139264467"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8700000047683716,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G7185396944","display_name":null,"funder_award_id":"0414-20160028","funder_id":"https://openalex.org/F4320317879","funder_display_name":"SK Hynix"}],"funders":[{"id":"https://openalex.org/F4320317879","display_name":"SK Hynix","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W2008964143","https://openalex.org/W2022512492","https://openalex.org/W2030871918","https://openalex.org/W2034342920","https://openalex.org/W2093232112","https://openalex.org/W2100403807","https://openalex.org/W2102650020","https://openalex.org/W2118616136","https://openalex.org/W2127624169","https://openalex.org/W2135048427","https://openalex.org/W2157407867","https://openalex.org/W2288499521","https://openalex.org/W2533333247","https://openalex.org/W2567368644","https://openalex.org/W2743479810","https://openalex.org/W2785102225","https://openalex.org/W2792054835","https://openalex.org/W3041002943","https://openalex.org/W3109138145","https://openalex.org/W6643546249","https://openalex.org/W6659905895","https://openalex.org/W6734077143","https://openalex.org/W6748827738"],"related_works":["https://openalex.org/W3013979739","https://openalex.org/W1994021281","https://openalex.org/W2139484866","https://openalex.org/W2474043983","https://openalex.org/W2008250178","https://openalex.org/W2078513307","https://openalex.org/W2566880546","https://openalex.org/W2544336511","https://openalex.org/W2144737022","https://openalex.org/W1978186604"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"a":[3,15,52,80,99],"ring":[4],"oscillator":[5],"(RO)-based":[6],"all-digital":[7],"phase-locked":[8],"loop":[9,19],"(ADPLL)":[10],"that":[11],"is":[12,37,62,128],"implemented":[13],"with":[14,79],"high-gain":[16],"analog":[17],"closed":[18],"for":[20,64],"supply":[21,96,110],"noise":[22,57],"compensation":[23],"(ACSC).":[24],"The":[25,133],"ACSC":[26,61,127],"not":[27],"only":[28],"allows":[29],"high-frequency":[30],"oscillation":[31],"of":[32,55,59,87,117,140],"the":[33,56,60,65,77,112,126,138,141],"RO":[34],"but":[35],"also":[36],"robust":[38],"over":[39],"process,":[40],"voltage,":[41],"and":[42,119,130,137,147],"temperature":[43],"(PVT)":[44],"variations":[45],"thanks":[46],"to":[47,67],"its":[48,69],"replica-based":[49],"configuration.":[50],"Moreover,":[51],"comprehensive":[53],"analysis":[54],"contribution":[58],"conducted":[63],"ADPLL":[66,113,143],"retain":[68],"low-jitter":[70],"output.":[71],"Implemented":[72],"in":[73],"40-nm":[74],"CMOS":[75],"technology,":[76],"ADPLL,":[78],"1.1-V":[81],"supply,":[82],"achieves":[83],"an":[84],"rms":[85,115],"jitter":[86],"289":[88],"fs":[89],"at":[90,122],"8":[91,123],"GHz":[92,124],"without":[93],"any":[94],"injected":[95],"noise.":[97],"Under":[98],"20-":[100],"<inline-formula":[101,149],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[102,150],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[103,151],"<tex-math":[104,152],"notation=\"LaTeX\">$\\text{m}\\textrm":[105],"{V}_{\\textrm":[106],"{rms}}$":[107],"</tex-math></inline-formula>":[108,157],"white":[109],"noise,":[111],"gives":[114],"jitters":[116],"8.7":[118],"0.63":[120],"ps":[121],"when":[125],"disabled":[129],"enabled,":[131],"respectively.":[132,159],"overall":[134],"power":[135],"consumption":[136],"area":[139],"presented":[142],"are":[144],"9.48":[145],"mW":[146],"0.055":[148],"notation=\"LaTeX\">$\\textrm":[153],"{mm}":[154],"{^{\\mathrm{":[155],"2}}}$":[156],",":[158]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":2}],"updated_date":"2026-07-02T09:51:11.867554","created_date":"2025-10-10T00:00:00"}