{"id":"https://openalex.org/W4210829063","doi":"https://doi.org/10.1109/jssc.2022.3146097","title":"A PAM-8 Wireline Transceiver With Linearity Improvement Technique and a Time-Domain Receiver Side FFE in 65 nm CMOS","display_name":"A PAM-8 Wireline Transceiver With Linearity Improvement Technique and a Time-Domain Receiver Side FFE in 65 nm CMOS","publication_year":2022,"publication_date":"2022-02-08","ids":{"openalex":"https://openalex.org/W4210829063","doi":"https://doi.org/10.1109/jssc.2022.3146097"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2022.3146097","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2022.3146097","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049025521","display_name":"Yusang Chun","orcid":"https://orcid.org/0000-0003-0371-2436"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Yusang Chun","raw_affiliation_strings":["MediaTek USA Inc, Irvine, CA, USA"],"affiliations":[{"raw_affiliation_string":"MediaTek USA Inc, Irvine, CA, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058421619","display_name":"M. Megahed","orcid":"https://orcid.org/0000-0001-8739-7810"},"institutions":[{"id":"https://openalex.org/I131249849","display_name":"Oregon State University","ror":"https://ror.org/00ysfqy60","country_code":"US","type":"education","lineage":["https://openalex.org/I131249849"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mohamed Megahed","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA","institution_ids":["https://openalex.org/I131249849"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004404909","display_name":"Ashwin Ramachandran","orcid":"https://orcid.org/0000-0002-2321-3397"},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ashwin Ramachandran","raw_affiliation_strings":["Texas Instruments, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Texas Instruments, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052751344","display_name":"Tejasvi Anand","orcid":"https://orcid.org/0000-0002-1737-7950"},"institutions":[{"id":"https://openalex.org/I131249849","display_name":"Oregon State University","ror":"https://ror.org/00ysfqy60","country_code":"US","type":"education","lineage":["https://openalex.org/I131249849"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tejasvi Anand","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA","institution_ids":["https://openalex.org/I131249849"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5049025521"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.026,"has_fulltext":false,"cited_by_count":23,"citation_normalized_percentile":{"value":0.86265611,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":"57","issue":"5","first_page":"1527","last_page":"1541"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.7409960627555847},{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.7368500232696533},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7138822078704834},{"id":"https://openalex.org/keywords/wireline","display_name":"Wireline","score":0.703222930431366},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5029651522636414},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.48879238963127136},{"id":"https://openalex.org/keywords/pulse-width-modulation","display_name":"Pulse-width modulation","score":0.45562031865119934},{"id":"https://openalex.org/keywords/time-domain","display_name":"Time domain","score":0.4484545886516571},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.42242205142974854},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.32228267192840576},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.29394179582595825},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.17980703711509705},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.11002576351165771}],"concepts":[{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.7409960627555847},{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.7368500232696533},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7138822078704834},{"id":"https://openalex.org/C2776951270","wikidata":"https://www.wikidata.org/wiki/Q8026910","display_name":"Wireline","level":3,"score":0.703222930431366},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5029651522636414},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.48879238963127136},{"id":"https://openalex.org/C92746544","wikidata":"https://www.wikidata.org/wiki/Q585184","display_name":"Pulse-width modulation","level":3,"score":0.45562031865119934},{"id":"https://openalex.org/C103824480","wikidata":"https://www.wikidata.org/wiki/Q185889","display_name":"Time domain","level":2,"score":0.4484545886516571},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.42242205142974854},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.32228267192840576},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.29394179582595825},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.17980703711509705},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.11002576351165771},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2022.3146097","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2022.3146097","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.7599999904632568,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":44,"referenced_works":["https://openalex.org/W1566916904","https://openalex.org/W1985419217","https://openalex.org/W1988065098","https://openalex.org/W1994362323","https://openalex.org/W1997677445","https://openalex.org/W2000147479","https://openalex.org/W2016473864","https://openalex.org/W2046983902","https://openalex.org/W2065119992","https://openalex.org/W2119827200","https://openalex.org/W2132401365","https://openalex.org/W2136940543","https://openalex.org/W2142272040","https://openalex.org/W2168388401","https://openalex.org/W2168391258","https://openalex.org/W2177443808","https://openalex.org/W2179692430","https://openalex.org/W2525360024","https://openalex.org/W2570488823","https://openalex.org/W2592571780","https://openalex.org/W2742685235","https://openalex.org/W2754266386","https://openalex.org/W2771412181","https://openalex.org/W2791231007","https://openalex.org/W2793219114","https://openalex.org/W2793529293","https://openalex.org/W2801817742","https://openalex.org/W2899541480","https://openalex.org/W2900227684","https://openalex.org/W2902336478","https://openalex.org/W2921382588","https://openalex.org/W2921538540","https://openalex.org/W2921629985","https://openalex.org/W2964457999","https://openalex.org/W2985797995","https://openalex.org/W2998450370","https://openalex.org/W3007505872","https://openalex.org/W3015421532","https://openalex.org/W3015563675","https://openalex.org/W3015675899","https://openalex.org/W6734697927","https://openalex.org/W6760117205","https://openalex.org/W6760891263","https://openalex.org/W6776238463"],"related_works":["https://openalex.org/W2368190399","https://openalex.org/W2374510365","https://openalex.org/W4200241224","https://openalex.org/W1964703610","https://openalex.org/W2759444425","https://openalex.org/W2085787479","https://openalex.org/W2015115382","https://openalex.org/W2324994223","https://openalex.org/W2527653927","https://openalex.org/W3160420002"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"a":[3,38],"pulse-amplitude-modulated":[4],"(PAM)-8":[5],"wireline":[6],"transceiver":[7,68],"with":[8,51,54,83],"receiver-side":[9],"pulsewidth-modulated":[10],"(PWM)":[11],"or":[12,24],"time-domain-based":[13],"feedforward":[14],"equalization":[15],"(FFE)":[16],"technique.":[17],"The":[18,65],"receiver":[19],"converts":[20],"the":[21,55,63],"voltage-modulated":[22],"signals":[23,26,29],"PAM":[25],"into":[27],"PWM":[28],"and":[30,43,76],"processes":[31],"them":[32],"using":[33],"inverter-based":[34],"delay":[35],"elements":[36],"having":[37],"rail-to-rail":[39],"voltage":[40],"swing.":[41],"Time-to-voltage":[42],"voltage-to-time":[44],"converters":[45],"are":[46],"designed":[47],"to":[48,73],"have":[49],"non-linearity":[50],"opposite":[52],"signs":[53],"aim":[56],"of":[57,86],"achieving":[58],"higher":[59],"front-end":[60],"linearity":[61],"on":[62],"receiver.":[64],"proposed":[66],"PAM-8":[67],"can":[69],"operate":[70],"from":[71],"12.0":[72],"39.6":[74],"Gb/s":[75],"compensates":[77],"14-dB":[78],"loss":[79],"at":[80],"6.6":[81],"GHz":[82],"an":[84],"efficiency":[85],"8.66":[87],"pJ/bit":[88],"in":[89],"65-nm":[90],"CMOS.":[91]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":11},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":4}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}