{"id":"https://openalex.org/W4210458886","doi":"https://doi.org/10.1109/jssc.2021.3138797","title":"A 25.6-Gb/s Interface Employing PAM-4-Based Four-Channel Multiplexing and Cascaded Clock and Data Recovery Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems","display_name":"A 25.6-Gb/s Interface Employing PAM-4-Based Four-Channel Multiplexing and Cascaded Clock and Data Recovery Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems","publication_year":2022,"publication_date":"2022-01-31","ids":{"openalex":"https://openalex.org/W4210458886","doi":"https://doi.org/10.1109/jssc.2021.3138797"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2021.3138797","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2021.3138797","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080338171","display_name":"Takashi Toi","orcid":"https://orcid.org/0000-0002-0197-9447"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Takashi Toi","raw_affiliation_strings":["Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan"],"raw_orcid":"https://orcid.org/0000-0002-0197-9447","affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040010831","display_name":"Junji Wadatsumi","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Junji Wadatsumi","raw_affiliation_strings":["Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101591670","display_name":"Hiroyuki Kobayashi","orcid":"https://orcid.org/0000-0002-6313-5549"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hiroyuki Kobayashi","raw_affiliation_strings":["Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049148311","display_name":"Yutaka Shimizu","orcid":"https://orcid.org/0000-0002-9749-7281"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yutaka Shimizu","raw_affiliation_strings":["Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110180589","display_name":"Yuji Satoh","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yuji Satoh","raw_affiliation_strings":["Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103430442","display_name":"Makoto Morimoto","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Makoto Morimoto","raw_affiliation_strings":["Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5106235720","display_name":"Rui Ito","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Rui Ito","raw_affiliation_strings":["Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074173270","display_name":"Mitsuyuki Ashida","orcid":"https://orcid.org/0000-0002-4399-4135"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Mitsuyuki Ashida","raw_affiliation_strings":["Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan"],"raw_orcid":"https://orcid.org/0000-0002-4399-4135","affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069653046","display_name":"Yuta Tsubouchi","orcid":"https://orcid.org/0000-0002-6607-573X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yuta Tsubouchi","raw_affiliation_strings":["Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan"],"raw_orcid":"https://orcid.org/0000-0002-6607-573X","affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001552649","display_name":"Mai Nozawa","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Mai Nozawa","raw_affiliation_strings":["Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003965381","display_name":"Go Urakawa","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Go Urakawa","raw_affiliation_strings":["Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007360587","display_name":"Jun Deguchi","orcid":"https://orcid.org/0000-0002-3414-5537"},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Jun Deguchi","raw_affiliation_strings":["Center for Semiconductor Research and Development, Toshiba Corporation, Kawasaki, Japan"],"raw_orcid":"https://orcid.org/0000-0002-3414-5537","affiliations":[{"raw_affiliation_string":"Center for Semiconductor Research and Development, Toshiba Corporation, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5025374739","display_name":"Ryuichi Fujimoto","orcid":"https://orcid.org/0000-0002-2374-7073"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ryuichi Fujimoto","raw_affiliation_strings":["Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Institute of Memory Technology Research and Development, Kawasaki, Japan","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.265,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.48974421,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"57","issue":"5","first_page":"1517","last_page":"1526"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":0.9947999715805054,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5780367255210876},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.5034281611442566},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4893900752067566},{"id":"https://openalex.org/keywords/bit-error-rate","display_name":"Bit error rate","score":0.4638647437095642},{"id":"https://openalex.org/keywords/clock-recovery","display_name":"Clock recovery","score":0.45647814869880676},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4433083236217499},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.44056445360183716},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4399491846561432},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4262712299823761},{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.4253959059715271},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.4128822088241577},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.31538623571395874},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.30463308095932007},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23459309339523315},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.22243943810462952},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.17895209789276123},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.13102716207504272},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.11172091960906982}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5780367255210876},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.5034281611442566},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4893900752067566},{"id":"https://openalex.org/C56296756","wikidata":"https://www.wikidata.org/wiki/Q840922","display_name":"Bit error rate","level":3,"score":0.4638647437095642},{"id":"https://openalex.org/C2779835379","wikidata":"https://www.wikidata.org/wiki/Q2348121","display_name":"Clock recovery","level":4,"score":0.45647814869880676},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4433083236217499},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.44056445360183716},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4399491846561432},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4262712299823761},{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.4253959059715271},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.4128822088241577},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.31538623571395874},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.30463308095932007},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23459309339523315},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.22243943810462952},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.17895209789276123},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.13102716207504272},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.11172091960906982},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2021.3138797","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2021.3138797","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W2031380370","https://openalex.org/W2767205552","https://openalex.org/W2777764455","https://openalex.org/W2779490737","https://openalex.org/W2779700767","https://openalex.org/W2801106500","https://openalex.org/W2802344585","https://openalex.org/W2907560421","https://openalex.org/W2909568857","https://openalex.org/W2921629985","https://openalex.org/W2964457999","https://openalex.org/W2965182358","https://openalex.org/W2965677982","https://openalex.org/W2966082180","https://openalex.org/W3015329381","https://openalex.org/W3020006362","https://openalex.org/W6734077143","https://openalex.org/W6749088218","https://openalex.org/W6749512339","https://openalex.org/W6749633364","https://openalex.org/W6760371878","https://openalex.org/W6760563682"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2617868873","https://openalex.org/W2385875016","https://openalex.org/W1512754984","https://openalex.org/W3204141294","https://openalex.org/W4306968100","https://openalex.org/W2376165157","https://openalex.org/W2082018612","https://openalex.org/W2113302467","https://openalex.org/W2366319377"],"abstract_inverted_index":{"This":[0],"article":[1,96],"presents":[2,97],"a":[3,48,67,131,145,160,187,214],"pulse-amplitude":[4],"modulation":[5],"(PAM)-4-based":[6],"25.6-Gb/s":[7,142],"serial":[8],"interface":[9,24,69,129,168],"for":[10,84,126],"high-bandwidth":[11],"(BW)":[12],"and":[13,34,43,58,82,108,112,183,216],"large-capacity":[14],"storage":[15],"systems":[16],"consisting":[17],"of":[18,56,79,138,150,172,190,192,199],"NAND":[19,31,62,200],"flash":[20,32],"memory.":[21],"A":[22],"conventional":[23],"with":[25,117,144,163,176,213],"multi-drop":[26],"bus":[27],"topology":[28],"between":[29,41,86],"the":[30,54,61,76,127,170,173],"memories":[33],"their":[35],"controller":[36,63,215],"has":[37],"an":[38],"inevitable":[39],"tradeoff":[40],"BW":[42],"capacity":[44],"if":[45],"we":[46],"assume":[47],"reasonable":[49],"PCB":[50],"design":[51],"in":[52],"which":[53],"numbers":[55],"pins":[57],"wires":[59],"near":[60],"is":[64],"limited.":[65],"Although":[66],"daisy-chain-based":[68],"can":[70,185],"resolve":[71],"this":[72,95],"tradeoff,":[73],"it":[74,184],"requires":[75],"additional":[77],"overheads":[78],"bridge":[80,87,174,218],"chips":[81,175],"procedures":[83],"distinguishing":[85],"chips.":[88,219],"In":[89],"order":[90],"to":[91],"address":[92],"these":[93],"challenges,":[94],"three":[98],"key":[99],"techniques:":[100],"1)":[101],"ring":[102],"topology;":[103],"2)":[104],"PAM-4-based":[105],"four-channel":[106],"multiplexing;":[107],"3)":[109],"cascaded":[110],"clock":[111],"data":[113,178,210],"recovery":[114],"(CDR)":[115],"circuits":[116],"phase-error-dependent":[118],"bang-bang":[119],"phase":[120],"detector":[121],"(PED-BBPD).":[122],"The":[123,166],"fabricated":[124],"transceiver":[125],"proposed":[128,167],"using":[130],"28-nm":[132],"CMOS":[133],"process":[134],"achieves":[135],"energy":[136],"efficiency":[137],"3.69":[139],"pJ/b":[140],"at":[141],"PRBS31":[143],"bit":[146],"error":[147],"rate":[148,179],"(BER)":[149],"less":[151],"than":[152,180],"<inline-formula":[153,203],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[154,204],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[155,205],"<tex-math":[156,206],"notation=\"LaTeX\">$10^{-15}$":[157],"</tex-math></inline-formula>":[158,209],"through":[159],"short":[161],"channel":[162],"1.84-dB":[164],"loss.":[165],"mitigates":[169],"overhead":[171],"higher":[177],"previous":[181],"works,":[182],"achieve":[186],"state-of-the-art":[188],"figure":[189],"merit":[191],"1.80":[193],"PKG":[194],"Gb/s/mW,":[195],"defined":[196],"as":[197],"\u201cNo.":[198],"packages":[201],"(PKGs)":[202],"notation=\"LaTeX\">$\\times":[207],"$":[208],"rate/power":[211],"consumption,\u201d":[212],"four":[217]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}