{"id":"https://openalex.org/W3214845255","doi":"https://doi.org/10.1109/jssc.2021.3128363","title":"A 15-Bit Quadrature Digital Power Amplifier With Transformer-Based Complex-Domain Efficiency Enhancement","display_name":"A 15-Bit Quadrature Digital Power Amplifier With Transformer-Based Complex-Domain Efficiency Enhancement","publication_year":2021,"publication_date":"2021-12-02","ids":{"openalex":"https://openalex.org/W3214845255","doi":"https://doi.org/10.1109/jssc.2021.3128363","mag":"3214845255"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2021.3128363","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2021.3128363","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100657989","display_name":"Yicheng Li","orcid":"https://orcid.org/0000-0003-4447-7452"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yicheng Li","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037491264","display_name":"Yun Yin","orcid":"https://orcid.org/0000-0002-3911-8079"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yun Yin","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051923549","display_name":"Diyang Zheng","orcid":"https://orcid.org/0009-0002-5496-0026"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Diyang Zheng","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054411205","display_name":"Xianglong Jia","orcid":"https://orcid.org/0000-0002-7288-674X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xianglong Jia","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070371129","display_name":"Jie Lin","orcid":"https://orcid.org/0000-0003-3476-110X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jie Lin","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081759507","display_name":"Fu Gao","orcid":"https://orcid.org/0000-0001-7190-4486"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fu Gao","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014411780","display_name":"Yiting Zhu","orcid":"https://orcid.org/0000-0003-1113-7507"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yiting Zhu","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5106121612","display_name":"Liang Xiong","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Liang Xiong","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083182163","display_name":"Na Yan","orcid":"https://orcid.org/0000-0001-7012-404X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Na Yan","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022547077","display_name":"Ye L\u00fc","orcid":"https://orcid.org/0000-0001-9054-2644"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ye Lu","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030822792","display_name":"Hongtao Xu","orcid":"https://orcid.org/0000-0003-1852-4112"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hongtao Xu","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":11,"corresponding_author_ids":["https://openalex.org/A5100657989"],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":2.4287,"has_fulltext":false,"cited_by_count":30,"citation_normalized_percentile":{"value":0.89399636,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":97,"max":99},"biblio":{"volume":"57","issue":"6","first_page":"1610","last_page":"1622"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11248","display_name":"Advanced Power Amplifier Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11248","display_name":"Advanced Power Amplifier Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10228","display_name":"Multilevel Inverters and Converters","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.6822727918624878},{"id":"https://openalex.org/keywords/quadrature-amplitude-modulation","display_name":"Quadrature amplitude modulation","score":0.616761326789856},{"id":"https://openalex.org/keywords/adjacent-channel","display_name":"Adjacent channel","score":0.5525453686714172},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.48860031366348267},{"id":"https://openalex.org/keywords/transformer","display_name":"Transformer","score":0.47247999906539917},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.447609543800354},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4350685477256775},{"id":"https://openalex.org/keywords/qam","display_name":"QAM","score":0.431194931268692},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3813250958919525},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3472778797149658},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.3318898677825928},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.23237308859825134},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2278498113155365},{"id":"https://openalex.org/keywords/bit-error-rate","display_name":"Bit error rate","score":0.18251118063926697},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.1293632984161377}],"concepts":[{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.6822727918624878},{"id":"https://openalex.org/C32409245","wikidata":"https://www.wikidata.org/wiki/Q749753","display_name":"Quadrature amplitude modulation","level":4,"score":0.616761326789856},{"id":"https://openalex.org/C2776908912","wikidata":"https://www.wikidata.org/wiki/Q16001834","display_name":"Adjacent channel","level":4,"score":0.5525453686714172},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.48860031366348267},{"id":"https://openalex.org/C66322947","wikidata":"https://www.wikidata.org/wiki/Q11658","display_name":"Transformer","level":3,"score":0.47247999906539917},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.447609543800354},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4350685477256775},{"id":"https://openalex.org/C59030546","wikidata":"https://www.wikidata.org/wiki/Q7265371","display_name":"QAM","level":5,"score":0.431194931268692},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3813250958919525},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3472778797149658},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.3318898677825928},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.23237308859825134},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2278498113155365},{"id":"https://openalex.org/C56296756","wikidata":"https://www.wikidata.org/wiki/Q840922","display_name":"Bit error rate","level":3,"score":0.18251118063926697},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.1293632984161377}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2021.3128363","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2021.3128363","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8100000023841858,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G4369394938","display_name":null,"funder_award_id":"61974171","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G6128929104","display_name":null,"funder_award_id":"61874153","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G6349048050","display_name":null,"funder_award_id":"2020YFB2205602","funder_id":"https://openalex.org/F4320335777","funder_display_name":"National Key Research and Development Program of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320335777","display_name":"National Key Research and Development Program of China","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":50,"referenced_works":["https://openalex.org/W1981305442","https://openalex.org/W1995246417","https://openalex.org/W1996113980","https://openalex.org/W2018401176","https://openalex.org/W2031540765","https://openalex.org/W2038285405","https://openalex.org/W2084208879","https://openalex.org/W2110302314","https://openalex.org/W2112799319","https://openalex.org/W2119021862","https://openalex.org/W2127685481","https://openalex.org/W2128818748","https://openalex.org/W2145709125","https://openalex.org/W2163330071","https://openalex.org/W2166055633","https://openalex.org/W2166585354","https://openalex.org/W2175077039","https://openalex.org/W2274213189","https://openalex.org/W2291664767","https://openalex.org/W2291980487","https://openalex.org/W2560308703","https://openalex.org/W2584918325","https://openalex.org/W2587184733","https://openalex.org/W2591749641","https://openalex.org/W2592149517","https://openalex.org/W2592426003","https://openalex.org/W2594929092","https://openalex.org/W2756971426","https://openalex.org/W2767726430","https://openalex.org/W2772833096","https://openalex.org/W2793242610","https://openalex.org/W2802930619","https://openalex.org/W2886495418","https://openalex.org/W2898762339","https://openalex.org/W2905459720","https://openalex.org/W2915944354","https://openalex.org/W2921316835","https://openalex.org/W2922217270","https://openalex.org/W2941647551","https://openalex.org/W2971573910","https://openalex.org/W2972249150","https://openalex.org/W3015414896","https://openalex.org/W3015923157","https://openalex.org/W3043149527","https://openalex.org/W3091128755","https://openalex.org/W3092254477","https://openalex.org/W3092619768","https://openalex.org/W3112968054","https://openalex.org/W3125514345","https://openalex.org/W3130207004"],"related_works":["https://openalex.org/W2147334234","https://openalex.org/W2159438609","https://openalex.org/W2900995485","https://openalex.org/W3196902411","https://openalex.org/W2064534496","https://openalex.org/W2139936226","https://openalex.org/W1970526599","https://openalex.org/W3026565890","https://openalex.org/W2161389097","https://openalex.org/W1970720357"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"a":[3,65],"15-bit":[4],"quadrature":[5,13,27],"digital":[6,151],"power":[7,23,36,55,102,104],"amplifier":[8],"(DPA)":[9],"with":[10,103,139,183],"in-phase":[11],"and":[12,15,29,77,133,175],"(IQ)-cell-sharing":[14],"transformer-based":[16],"Doherty":[17],"operation,":[18],"which":[19],"compensates":[20],"the":[21,42,69,78,120,134,176],"3-dB":[22],"loss":[24],"in":[25,64],"traditional":[26],"architecture":[28],"enhances":[30],"efficiency.":[31,49],"Efficiency":[32],"enhancement":[33],"at":[34,145],"3-/6-dB":[35],"backoffs":[37],"(PBOs)":[38],"is":[39,57,71],"obtained":[40,182],"on":[41],"IQ":[43],"complex":[44],"plane":[45],"to":[46],"improve":[47],"average":[48,135,177],"A":[50],"single-transformer-footprint":[51],"parallel-combining":[52],"transformer":[53],"(PCT)":[54],"combiner":[56],"implemented":[58],"for":[59,156],"compact":[60],"die":[61],"size.":[62],"Fabricated":[63],"55-nm":[66],"CMOS":[67],"technology,":[68],"DPA":[70,121],"powered":[72],"by":[73],"1.2-/2.4-V":[74],"supply":[75],"voltages":[76],"core":[79],"circuit":[80],"only":[81],"occupies":[82],"1.05":[83],"<inline-formula":[84,123,165],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[85,93,124,166],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[86,125,167],"<tex-math":[87,126,168],"notation=\"LaTeX\">$\\times":[88],"$":[89],"</tex-math></inline-formula>":[90,129,171],"1.14-mm":[91],"<sup":[92],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[94],"chip":[95],"area.":[96],"It":[97],"achieves":[98,122],"29.3-dBm":[99],"peak":[100],"output":[101],"added":[105],"efficiency":[106],"(PAE)":[107],"of":[108,130,137,172,179],"43.1%.":[109],"With":[110],"10-MHz":[111],"64-quadratic-amplitude":[112],"modulation":[113],"(QAM)":[114],"local":[115,160],"thermal":[116],"equilibrium":[117],"(LTE)":[118],"signal,":[119,164],"notation=\"LaTeX\">$P_{\\mathrm":[127,169],"{avg}}$":[128,170],"23.62":[131],"dBm":[132,174],"PAE":[136,178],"24.4%":[138],"\u221225.6-dB":[140],"error":[141],"vector":[142],"magnitude":[143],"(EVM)":[144],"0.85":[146],"GHz":[147],"without":[148],"using":[149],"any":[150],"predistortion":[152],"(DPD)":[153],"technique.":[154],"Moreover,":[155],"20-MHz":[157],"64-QAM":[158],"wireless":[159],"area":[161],"network":[162],"(WLAN)":[163],"21.01":[173],"20.1%":[180],"are":[181],"\u221225.1-dB":[184],"EVM.":[185]},"counts_by_year":[{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":10},{"year":2023,"cited_by_count":9},{"year":2022,"cited_by_count":5}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}