{"id":"https://openalex.org/W3203077206","doi":"https://doi.org/10.1109/jssc.2021.3113335","title":"Syn-STELLAR: An EM/Power SCA-Resilient AES-256 With Synthesis-Friendly Signature Attenuation","display_name":"Syn-STELLAR: An EM/Power SCA-Resilient AES-256 With Synthesis-Friendly Signature Attenuation","publication_year":2021,"publication_date":"2021-10-02","ids":{"openalex":"https://openalex.org/W3203077206","doi":"https://doi.org/10.1109/jssc.2021.3113335","mag":"3203077206"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2021.3113335","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2021.3113335","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044592906","display_name":"Archisman Ghosh","orcid":"https://orcid.org/0000-0002-7842-030X"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Archisman Ghosh","raw_affiliation_strings":["School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"raw_orcid":"https://orcid.org/0000-0002-7842-030X","affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016409294","display_name":"Debayan Das","orcid":"https://orcid.org/0000-0003-1843-0124"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Debayan Das","raw_affiliation_strings":["School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"raw_orcid":"https://orcid.org/0000-0003-1843-0124","affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022165727","display_name":"Josef Danial","orcid":"https://orcid.org/0000-0001-5837-1304"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Josef Danial","raw_affiliation_strings":["School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"raw_orcid":"https://orcid.org/0000-0001-5837-1304","affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076642880","display_name":"Vivek De","orcid":"https://orcid.org/0000-0001-5207-1079"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vivek De","raw_affiliation_strings":["Intel Labs, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0001-5207-1079","affiliations":[{"raw_affiliation_string":"Intel Labs, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078467758","display_name":"Santosh Ghosh","orcid":"https://orcid.org/0000-0003-0069-7971"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Santosh Ghosh","raw_affiliation_strings":["Intel Labs, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0003-0069-7971","affiliations":[{"raw_affiliation_string":"Intel Labs, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056832262","display_name":"Shreyas Sen","orcid":"https://orcid.org/0000-0001-5566-8946"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shreyas Sen","raw_affiliation_strings":["School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"raw_orcid":"https://orcid.org/0000-0001-5566-8946","affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2045,"currency":"USD","value_usd":2045},"apc_paid":null,"fwci":3.5053,"has_fulltext":false,"cited_by_count":34,"citation_normalized_percentile":{"value":0.93507965,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":95,"max":99},"biblio":{"volume":"57","issue":"1","first_page":"167","last_page":"181"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/attenuation","display_name":"Attenuation","score":0.6025543212890625},{"id":"https://openalex.org/keywords/signature","display_name":"Signature (topology)","score":0.5538924932479858},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4343033730983734},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.4295361638069153},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10315033793449402},{"id":"https://openalex.org/keywords/optics","display_name":"Optics","score":0.08691656589508057}],"concepts":[{"id":"https://openalex.org/C184652730","wikidata":"https://www.wikidata.org/wiki/Q2357982","display_name":"Attenuation","level":2,"score":0.6025543212890625},{"id":"https://openalex.org/C2779696439","wikidata":"https://www.wikidata.org/wiki/Q7512811","display_name":"Signature (topology)","level":2,"score":0.5538924932479858},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4343033730983734},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.4295361638069153},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10315033793449402},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.08691656589508057},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2021.3113335","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2021.3113335","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G11353677","display_name":"SaTC: CORE: Small: Collaborative: EM and Power Side-Channel Attack Immunity through High-Efficiency Hardware Obfuscations","funder_award_id":"1719235","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G4816857010","display_name":"EAGER: Collaborative: Machine-Learning based Side-Channel Attack and Hardware Countermeasures","funder_award_id":"1935573","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320307102","display_name":"Intel Corporation","ror":"https://ror.org/01ek73717"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1549320745","https://openalex.org/W1560519124","https://openalex.org/W1580211761","https://openalex.org/W1613874182","https://openalex.org/W2053832511","https://openalex.org/W2100734746","https://openalex.org/W2109309427","https://openalex.org/W2116406812","https://openalex.org/W2128197017","https://openalex.org/W2259783508","https://openalex.org/W2404401031","https://openalex.org/W2604388769","https://openalex.org/W2799920367","https://openalex.org/W2804635567","https://openalex.org/W2921643410","https://openalex.org/W2921829440","https://openalex.org/W2954035222","https://openalex.org/W2982381884","https://openalex.org/W3015882210","https://openalex.org/W3048892865","https://openalex.org/W3105103435","https://openalex.org/W3109014748","https://openalex.org/W3127626522","https://openalex.org/W6631075134","https://openalex.org/W6635937959","https://openalex.org/W6766714570"],"related_works":["https://openalex.org/W2935759653","https://openalex.org/W3105167352","https://openalex.org/W54078636","https://openalex.org/W2954470139","https://openalex.org/W1501425562","https://openalex.org/W2902782467","https://openalex.org/W3084825885","https://openalex.org/W2298861036","https://openalex.org/W3148032049","https://openalex.org/W2271181815"],"abstract_inverted_index":{"Mathematically":[0],"secure":[1],"cryptographic":[2],"algorithms":[3],"leak":[4],"meaningful":[5],"side-channel":[6,21],"information":[7],"in":[8,169,274],"the":[9,63,89,107,148,158,164,170,231,235,246,257],"form":[10],"of":[11,65,166,234],"correlated":[12],"power":[13,224,284],"and":[14,43,48,83,144,183,211,223,244,249,269,278,285],"electromagnetic":[15],"(EM)":[16],"signals,":[17],"leading":[18],"to":[19,40,58,87,93,110,179,191,214,289],"physical":[20],"analysis":[22],"(SCA)":[23],"attacks.":[24],"Circuit-level":[25],"countermeasures":[26,54],"against":[27],"power/EM":[28],"SCA":[29],"include":[30],"a":[31,98,275],"current":[32,78,272],"equalizer,":[33],"IVR,":[34],"non-linear":[35],"LDOs,":[36],"enhancing":[37],"protection":[38,56],"up":[39,57],"10M":[41,92],"traces,":[42],"current-domain":[44,171],"signature":[45,150],"attenuation":[46,151,268],"(CDSA),":[47],"randomized":[49],"NL-LDO":[50],"cascaded":[51],"with":[52,76,204,283],"arithmetic":[53],"achieved":[55],">1B.":[59],"This":[60,195,254],"work":[61],"embraces":[62],"concept":[64],"analog":[66],"CDSA":[67],"but":[68],"makes":[69],"it":[70,181],"easily":[71],"scalable":[72],"over":[73],"technology":[74],"nodes":[75],"digital-friendly":[77,276],"sources,":[79],"digital":[80,84,100,149,182],"control":[81],"loop,":[82],"bleed":[85,108],"path":[86,109],"increase":[88],"MTD":[90,217,282],"from":[91],"250M":[94],"($25\\times":[95],"$improvement,":[96],"using":[97],"single":[99],"countermeasure).":[101],"Ring":[102],"oscillator":[103],"(RO)":[104],"used":[105],"as":[106,115,141],"bypass":[111],"encryption-dependent":[112],"leakage":[113],"acts":[114,140],"local":[116],"negative":[117],"feedback":[118,146],"(LNFB).":[119],"Besides,":[120],"based":[121],"on":[122],"RO":[123,139],"oscillation":[124],"frequency,":[125],"AES":[126],"node":[127],"voltage":[128],"can":[129],"be":[130],"tuned":[131],"at":[132],"startup,":[133],"PVT,":[134],"or":[135],"frequency":[136],"variation.":[137],"Thus,":[138],"integrated":[142],"LNFB":[143],"global":[145],"for":[147,188,220],"circuit":[152,155,187],"(DSAC).":[153],"Another":[154],"technique,":[156],"namely,":[157,197],"time-varying":[159],"transfer":[160],"function":[161],"(TVTF),":[162],"removes":[163],"requirement":[165],"dc":[167],"bias":[168],"equalizer":[172],"(best":[173],"switch":[174,185],"capacitor-based":[175],"countermeasure":[176],"till":[177],"date)":[178],"make":[180],"utilizes":[184],"cap-based":[186],"time-domain":[189],"obfuscation":[190],"achieve":[192,215],"enhanced":[193],"security.":[194],"work,":[196],"Syn-STELLAR:":[198],"SYNthesis-friendly":[199],"Signature":[200],"aTtenuation":[201],"Embedded":[202],"crypto":[203],"Low-Level":[205],"metAl":[206],"Routing,":[207],"combines":[208],"both":[209,221,245],"DSAC":[210],"TVTF":[212],"techniques":[213],"an":[216],">":[218,280],"1.25B":[219,281],"EM":[222],"SCA,":[225],"which":[226,261],"is":[227,256],"25%":[228],"higher":[229],"than":[230],"existing":[232],"state":[233],"art.":[236],"The":[237],"65-nm":[238],"CMOS":[239],"test":[240],"chip":[241],"contains":[242],"unprotected":[243],"protected":[247],"(DSAC":[248],"DSAC-TVTF)":[250],"parallel":[251],"AES-256":[252],"implementation.":[253],"implementation":[255],"first":[258],"synthesis-friendly":[259],"countermeasure,":[260],"converges":[262],"two":[263],"analog-type":[264],"strong":[265],"protections":[266],"(signature":[267],"switched":[270],"cap":[271],"equalizer)":[273],"solution":[277],"achieves":[279],"area":[286],"overheads":[287],"comparable":[288],"previous":[290],"circuit-level":[291],"countermeasures.":[292]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":11},{"year":2023,"cited_by_count":11},{"year":2022,"cited_by_count":3}],"updated_date":"2026-08-28T12:50:07.497085","created_date":"2025-10-10T00:00:00"}
