{"id":"https://openalex.org/W3165872030","doi":"https://doi.org/10.1109/jssc.2021.3079111","title":"A 10-GS/s NRZ/Mixing DAC With Switching-Glitch Compensation Achieving SFDR &gt;64/50 dBc Over the First/Second Nyquist Zone","display_name":"A 10-GS/s NRZ/Mixing DAC With Switching-Glitch Compensation Achieving SFDR &gt;64/50 dBc Over the First/Second Nyquist Zone","publication_year":2021,"publication_date":"2021-05-21","ids":{"openalex":"https://openalex.org/W3165872030","doi":"https://doi.org/10.1109/jssc.2021.3079111","mag":"3165872030"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2021.3079111","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2021.3079111","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101473852","display_name":"Hung-Yi Huang","orcid":"https://orcid.org/0000-0002-1465-9995"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Hung-Yi Huang","raw_affiliation_strings":["Department of Electrical Engineering, National Cheng Kung University (NCKU), Tainan, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University (NCKU), Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100639025","display_name":"Xinyu Chen","orcid":"https://orcid.org/0000-0002-1261-2720"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Xin-Yu Chen","raw_affiliation_strings":["Department of Electrical Engineering, National Cheng Kung University (NCKU), Tainan, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University (NCKU), Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056275655","display_name":"Tai-Haur Kuo","orcid":"https://orcid.org/0000-0002-5477-0583"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tai-Haur Kuo","raw_affiliation_strings":["Department of Electrical Engineering, National Cheng Kung University (NCKU), Tainan, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University (NCKU), Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5101473852"],"corresponding_institution_ids":["https://openalex.org/I91807558"],"apc_list":null,"apc_paid":null,"fwci":1.1846,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.75919732,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"56","issue":"10","first_page":"3145","last_page":"3156"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.9747012257575989},{"id":"https://openalex.org/keywords/glitch","display_name":"Glitch","score":0.7984457015991211},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.6371697187423706},{"id":"https://openalex.org/keywords/dbc","display_name":"dBc","score":0.6362738609313965},{"id":"https://openalex.org/keywords/nyquist\u2013shannon-sampling-theorem","display_name":"Nyquist\u2013Shannon sampling theorem","score":0.5861189365386963},{"id":"https://openalex.org/keywords/digital-to-analog-converter","display_name":"Digital-to-analog converter","score":0.5753361582756042},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5145994424819946},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45721670985221863},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3867869973182678},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.37994956970214844},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.27442923188209534},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16031622886657715},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.08024665713310242}],"concepts":[{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.9747012257575989},{"id":"https://openalex.org/C191287063","wikidata":"https://www.wikidata.org/wiki/Q543281","display_name":"Glitch","level":3,"score":0.7984457015991211},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.6371697187423706},{"id":"https://openalex.org/C193523891","wikidata":"https://www.wikidata.org/wiki/Q1771950","display_name":"dBc","level":3,"score":0.6362738609313965},{"id":"https://openalex.org/C288623","wikidata":"https://www.wikidata.org/wiki/Q679800","display_name":"Nyquist\u2013Shannon sampling theorem","level":2,"score":0.5861189365386963},{"id":"https://openalex.org/C2779879419","wikidata":"https://www.wikidata.org/wiki/Q210863","display_name":"Digital-to-analog converter","level":3,"score":0.5753361582756042},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5145994424819946},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45721670985221863},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3867869973182678},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.37994956970214844},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.27442923188209534},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16031622886657715},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.08024665713310242}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2021.3079111","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2021.3079111","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320322795","display_name":"Ministry of Science and Technology, Taiwan","ror":"https://ror.org/02kv4zf79"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1733764130","https://openalex.org/W2029461083","https://openalex.org/W2036604277","https://openalex.org/W2145297550","https://openalex.org/W2150824877","https://openalex.org/W2158374654","https://openalex.org/W2165580659","https://openalex.org/W2166427430","https://openalex.org/W2400300013","https://openalex.org/W2518652590","https://openalex.org/W2592149517","https://openalex.org/W2751437525","https://openalex.org/W2892043033","https://openalex.org/W2896875977","https://openalex.org/W3027920749","https://openalex.org/W4242571630","https://openalex.org/W4245979535","https://openalex.org/W6684481881","https://openalex.org/W6734154559","https://openalex.org/W6823938661"],"related_works":["https://openalex.org/W2365263737","https://openalex.org/W2271597448","https://openalex.org/W2242622510","https://openalex.org/W2971803165","https://openalex.org/W2150824877","https://openalex.org/W2344053280","https://openalex.org/W1994796450","https://openalex.org/W2140339712","https://openalex.org/W2038124446","https://openalex.org/W2076001147"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"a":[3,23,38,70,174,190],"high-linearity":[4],"wide-bandwidth":[5],"current-steering":[6],"digital-to-analog":[7],"converter":[8],"(DAC).":[9],"To":[10],"overcome":[11],"the":[12,20,45,49,55,62,65,76,80,85,89,110,123,136,145],"code-dependent":[13],"current-switching":[14],"glitch":[15,32,43,53,81],"effect,":[16],"which":[17,28],"seriously":[18],"degrades":[19],"DAC":[21,46,56,66,90,98,127,170],"linearity,":[22],"switching-glitch":[24],"compensation":[25],"(SGC)":[26],"technique,":[27],"is":[29,34,72,101,115],"realized":[30,102],"with":[31,99,128,156,171,178,200],"duplicators,":[33,82],"proposed":[35,73],"to":[36,74,118,151],"generate":[37],"complementary":[39],"amount":[40,50],"of":[41,51,64,79],"switching":[42,52],"at":[44,54,88],"output.":[47,67],"Hence,":[48],"output":[57,91,158],"becomes":[58],"code-independent,":[59],"thus":[60,83],"improving":[61],"linearity":[63],"In":[68],"addition,":[69],"decorrelator":[71],"randomize":[75],"mismatch":[77],"effect":[78],"eliminating":[84],"mismatch-induced":[86],"spur":[87],"spectrum.":[92],"A":[93],"14-bit":[94],"10-GS/s":[95],"non-return-to-zero":[96],"(NRZ)/Mixing":[97],"SGC":[100,129,172],"in":[103],"28-nm":[104],"CMOS.":[105],"Measurement":[106],"results":[107],"show":[108],"that":[109],"spurious":[111],"free-dynamic":[112],"range":[113],"(SFDR)":[114],"improved":[116],"up":[117],"around":[119],"20":[120],"dB":[121],"by":[122],"SGC.":[124],"Therefore,":[125],"this":[126,169],"achieves":[130,173],"an":[131,157,201],"SFDR":[132,177,202],">64":[133],"dBc":[134,143],"over":[135,144],"entire":[137,146],"first":[138],"Nyquist":[139,148],"zone":[140],"and":[141,189],">50":[142],"second":[147],"zone.":[149],"Compared":[150],"prior":[152],"state-of-the-art":[153],"CMOS":[154],"DACs":[155],"frequency":[159],"<inline-formula":[160,179,193],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[161,180,194],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[162,181,195],"<tex-math":[163,182,196],"notation=\"LaTeX\">$(f_{\\mathrm":[164],"{out}})":[165],"\\ge3.4$":[166],"</tex-math></inline-formula>":[167,185,199],"GHz,":[168],"12.5-dB":[175],"better":[176],"notation=\"LaTeX\">$f_{\\mathrm":[183,197],"{out}}$":[184,198],"near":[186],"10":[187],"GHz":[188],"1.4x":[191],"higher":[192],"larger":[203],"than":[204],"50":[205],"dBc.":[206]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1}],"updated_date":"2026-03-27T14:29:43.386196","created_date":"2025-10-10T00:00:00"}
