{"id":"https://openalex.org/W3107488509","doi":"https://doi.org/10.1109/jssc.2020.3032972","title":"A 10-Gb/s 180-GHz Phase-Locked-Loop Minimum Shift Keying Receiver","display_name":"A 10-Gb/s 180-GHz Phase-Locked-Loop Minimum Shift Keying Receiver","publication_year":2020,"publication_date":"2020-11-25","ids":{"openalex":"https://openalex.org/W3107488509","doi":"https://doi.org/10.1109/jssc.2020.3032972","mag":"3107488509"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2020.3032972","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2020.3032972","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5058727360","display_name":"Shenggang Dong","orcid":"https://orcid.org/0000-0002-4530-5065"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shenggang Dong","raw_affiliation_strings":["The University of Texas at Dallas, Richardson, TX, USA"],"raw_orcid":"https://orcid.org/0000-0002-4530-5065","affiliations":[{"raw_affiliation_string":"The University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055548726","display_name":"Ibukunoluwa Momson","orcid":"https://orcid.org/0000-0001-5983-4489"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ibukunoluwa Momson","raw_affiliation_strings":["The University of Texas at Dallas, Richardson, TX, USA"],"raw_orcid":"https://orcid.org/0000-0001-5983-4489","affiliations":[{"raw_affiliation_string":"The University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016281881","display_name":"Sandeep Kshattry","orcid":null},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sandeep Kshattry","raw_affiliation_strings":["The University of Texas at Dallas, Richardson, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036379526","display_name":"Pavan Yelleswarapu","orcid":"https://orcid.org/0000-0001-5605-417X"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pavan Yelleswarapu","raw_affiliation_strings":["The University of Texas at Dallas, Richardson, TX, USA"],"raw_orcid":"https://orcid.org/0000-0001-5605-417X","affiliations":[{"raw_affiliation_string":"The University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080735730","display_name":"Wooyeol Choi","orcid":"https://orcid.org/0000-0002-6248-0674"},"institutions":[{"id":"https://openalex.org/I115475287","display_name":"Oklahoma State University","ror":"https://ror.org/01g9vbr38","country_code":"US","type":"education","lineage":["https://openalex.org/I115475287"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wooyeol Choi","raw_affiliation_strings":["Oklahoma State University, Stillwater, OK, USA"],"raw_orcid":"https://orcid.org/0000-0002-6248-0674","affiliations":[{"raw_affiliation_string":"Oklahoma State University, Stillwater, OK, USA","institution_ids":["https://openalex.org/I115475287"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5025240967","display_name":"Kenneth K. O","orcid":null},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kenneth K. O","raw_affiliation_strings":["The University of Texas at Dallas, Richardson, TX, USA"],"raw_orcid":"https://orcid.org/0000-0003-3624-1204","affiliations":[{"raw_affiliation_string":"The University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.4569,"has_fulltext":false,"cited_by_count":23,"citation_normalized_percentile":{"value":0.82451219,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":98},"biblio":{"volume":"56","issue":"3","first_page":"681","last_page":"693"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7481309771537781},{"id":"https://openalex.org/keywords/bit-error-rate","display_name":"Bit error rate","score":0.6820395588874817},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.5524446964263916},{"id":"https://openalex.org/keywords/phase-shift-keying","display_name":"Phase-shift keying","score":0.517382025718689},{"id":"https://openalex.org/keywords/frequency-shift-keying","display_name":"Frequency-shift keying","score":0.481065034866333},{"id":"https://openalex.org/keywords/keying","display_name":"Keying","score":0.4679989218711853},{"id":"https://openalex.org/keywords/phase","display_name":"Phase (matter)","score":0.4447932243347168},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.4182775616645813},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.4108020067214966},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3870367407798767},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.37878602743148804},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3663346767425537},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3010733723640442},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.2623322010040283},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.24213963747024536},{"id":"https://openalex.org/keywords/demodulation","display_name":"Demodulation","score":0.13558074831962585},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11173093318939209},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08884093165397644}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7481309771537781},{"id":"https://openalex.org/C56296756","wikidata":"https://www.wikidata.org/wiki/Q840922","display_name":"Bit error rate","level":3,"score":0.6820395588874817},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.5524446964263916},{"id":"https://openalex.org/C186378180","wikidata":"https://www.wikidata.org/wiki/Q4874866","display_name":"Phase-shift keying","level":4,"score":0.517382025718689},{"id":"https://openalex.org/C163996819","wikidata":"https://www.wikidata.org/wiki/Q1166054","display_name":"Frequency-shift keying","level":4,"score":0.481065034866333},{"id":"https://openalex.org/C2776542216","wikidata":"https://www.wikidata.org/wiki/Q6398306","display_name":"Keying","level":2,"score":0.4679989218711853},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.4447932243347168},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.4182775616645813},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.4108020067214966},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3870367407798767},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.37878602743148804},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3663346767425537},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3010733723640442},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.2623322010040283},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.24213963747024536},{"id":"https://openalex.org/C195251586","wikidata":"https://www.wikidata.org/wiki/Q1185939","display_name":"Demodulation","level":3,"score":0.13558074831962585},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11173093318939209},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08884093165397644},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2020.3032972","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2020.3032972","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8199999928474426}],"awards":[{"id":"https://openalex.org/G2962603034","display_name":null,"funder_award_id":"ID: 2810.015","funder_id":"https://openalex.org/F4320327708","funder_display_name":"University of Texas at Dallas"}],"funders":[{"id":"https://openalex.org/F4320327708","display_name":"University of Texas at Dallas","ror":"https://ror.org/049emcs32"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W575517596","https://openalex.org/W1569638374","https://openalex.org/W1594439462","https://openalex.org/W1599994156","https://openalex.org/W1644985135","https://openalex.org/W1974271750","https://openalex.org/W1977985878","https://openalex.org/W1986804807","https://openalex.org/W2021917553","https://openalex.org/W2029159613","https://openalex.org/W2057898183","https://openalex.org/W2068360072","https://openalex.org/W2103555061","https://openalex.org/W2106908638","https://openalex.org/W2164125331","https://openalex.org/W2166775635","https://openalex.org/W2167837878","https://openalex.org/W2289852718","https://openalex.org/W2292650154","https://openalex.org/W2464590686","https://openalex.org/W2476112607","https://openalex.org/W2488159282","https://openalex.org/W2533904379","https://openalex.org/W2592683973","https://openalex.org/W2792040330","https://openalex.org/W2800201501","https://openalex.org/W2900351848","https://openalex.org/W2941941125","https://openalex.org/W2976483777","https://openalex.org/W2980769293","https://openalex.org/W2991130518","https://openalex.org/W3020700221","https://openalex.org/W3048803445","https://openalex.org/W6664952125","https://openalex.org/W6696448144","https://openalex.org/W6733772320","https://openalex.org/W6770424814"],"related_works":["https://openalex.org/W1533864796","https://openalex.org/W2543043733","https://openalex.org/W2124362598","https://openalex.org/W2508204955","https://openalex.org/W2911701426","https://openalex.org/W4388448167","https://openalex.org/W2410852462","https://openalex.org/W2785337709","https://openalex.org/W1489774986","https://openalex.org/W1869045282"],"abstract_inverted_index":{"A":[0,30],"180-GHz":[1],"minimum":[2],"shift":[3],"keying":[4],"(MSK)":[5],"receiver":[6],"(RX)":[7],"using":[8],"a":[9,26,81,101],"phase-locked":[10],"loop":[11],"(PLL),":[12],"which":[13],"self-synchronizes":[14],"the":[15,36,40,58,63,72,93,117,120,127],"carrier":[16],"frequency,":[17],"is":[18,23,116,126],"demonstrated.":[19],"The":[20,111],"mixer-first":[21],"RX":[22,73],"fabricated":[24],"in":[25],"65-nm":[27],"CMOS":[28],"process.":[29],"double-balanced":[31],"anti-parallel-diode-pair":[32],"sub-harmonic":[33],"mixer":[34],"performs":[35],"phase":[37],"detection,":[38],"reducing":[39],"frequency":[41],"of":[42,97,103,123],"local":[43],"oscillator":[44],"(LO)":[45],"by":[46,51],"half.":[47],"Tunable":[48],"zeros":[49],"realized":[50],"series":[52],"inductors":[53],"are":[54],"used":[55],"to":[56,61],"improve":[57],"stability":[59],"and":[60,91,119],"increase":[62],"data":[64,95,121],"rate":[65,84,96,122],"handling":[66],"capability.":[67],"Without":[68],"external":[69],"LO":[70],"synchronization,":[71],"demodulates":[74],"MSK":[75],"signals":[76],"at":[77,92,113],"10":[78,87,106,114],"Gb/s":[79,99,115,125],"with":[80,100],"bit":[82],"error":[83],"(BER)":[85],"<;":[86],"<sup":[88,107],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[89,108],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">-12</sup>":[90],"maximum":[94],"12.5":[98,124],"BER":[102,112],"3.8":[104],"\u00d7":[105],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">-5</sup>":[109],".":[110],"lowest":[118],"highest":[128],"for":[129],"PLL":[130],"RXs.":[131]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":4}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}