{"id":"https://openalex.org/W4248108322","doi":"https://doi.org/10.1109/jssc.2020.3019344","title":"A 66-fs-rms Jitter 12.8-to-15.2-GHz Fractional-N Bang\u2013Bang PLL With Digital Frequency-Error Recovery for Fast Locking","display_name":"A 66-fs-rms Jitter 12.8-to-15.2-GHz Fractional-N Bang\u2013Bang PLL With Digital Frequency-Error Recovery for Fast Locking","publication_year":2020,"publication_date":"2020-09-03","ids":{"openalex":"https://openalex.org/W4248108322","doi":"https://doi.org/10.1109/jssc.2020.3019344"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2020.3019344","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2020.3019344","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075806913","display_name":"Alessio Santiccioli","orcid":"https://orcid.org/0000-0002-2301-5702"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alessio Santiccioli","raw_affiliation_strings":["Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy"],"raw_orcid":"https://orcid.org/0000-0002-2301-5702","affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027695549","display_name":"Mario Mercandelli","orcid":"https://orcid.org/0000-0003-0847-9207"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Mario Mercandelli","raw_affiliation_strings":["Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy"],"raw_orcid":"https://orcid.org/0000-0003-0847-9207","affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071532224","display_name":"Luca Bertulessi","orcid":"https://orcid.org/0000-0001-6167-6512"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luca Bertulessi","raw_affiliation_strings":["Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy"],"raw_orcid":"https://orcid.org/0000-0001-6167-6512","affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036699269","display_name":"Angelo Parisi","orcid":"https://orcid.org/0000-0003-1397-9011"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Angelo Parisi","raw_affiliation_strings":["Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy"],"raw_orcid":"https://orcid.org/0000-0003-1397-9011","affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046032176","display_name":"Dmytro Cherniak","orcid":"https://orcid.org/0000-0001-7662-9022"},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Dmytro Cherniak","raw_affiliation_strings":["Infineon Technologies Austria, Villach, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies Austria, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051946676","display_name":"Andrea L. Lacaita","orcid":"https://orcid.org/0000-0003-0315-514X"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Andrea L. Lacaita","raw_affiliation_strings":["Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy"],"raw_orcid":"https://orcid.org/0000-0003-0315-514X","affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073514694","display_name":"Carlo Samori","orcid":"https://orcid.org/0000-0002-7084-0721"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Carlo Samori","raw_affiliation_strings":["Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy"],"raw_orcid":"https://orcid.org/0000-0002-7084-0721","affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085904857","display_name":"Salvatore Levantino","orcid":"https://orcid.org/0000-0003-0895-1700"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Salvatore Levantino","raw_affiliation_strings":["Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy"],"raw_orcid":"https://orcid.org/0000-0003-0895-1700","affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":3.5142,"has_fulltext":false,"cited_by_count":94,"citation_normalized_percentile":{"value":0.93681103,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":98,"max":100},"biblio":{"volume":"55","issue":"12","first_page":"3349","last_page":"3361"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8349381685256958},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7310510873794556},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.5616527199745178},{"id":"https://openalex.org/keywords/dbc","display_name":"dBc","score":0.5518364906311035},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.5218293070793152},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.514127790927887},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.41769590973854065},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3541845679283142},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1707664430141449},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.15521785616874695},{"id":"https://openalex.org/keywords/optics","display_name":"Optics","score":0.11523377895355225}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8349381685256958},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7310510873794556},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.5616527199745178},{"id":"https://openalex.org/C193523891","wikidata":"https://www.wikidata.org/wiki/Q1771950","display_name":"dBc","level":3,"score":0.5518364906311035},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.5218293070793152},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.514127790927887},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.41769590973854065},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3541845679283142},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1707664430141449},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.15521785616874695},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.11523377895355225}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/jssc.2020.3019344","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2020.3019344","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},{"id":"pmh:oai:re.public.polimi.it:11311/1145899","is_oa":false,"landing_page_url":"http://hdl.handle.net/11311/1145899","pdf_url":null,"source":{"id":"https://openalex.org/S4306400312","display_name":"Virtual Community of Pathological Anatomy (University of Castilla La Mancha)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79189158","host_organization_name":"University of Castilla-La Mancha","host_organization_lineage":["https://openalex.org/I79189158"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":40,"referenced_works":["https://openalex.org/W1492059061","https://openalex.org/W1994184480","https://openalex.org/W1997287970","https://openalex.org/W2017690880","https://openalex.org/W2023401960","https://openalex.org/W2102596261","https://openalex.org/W2105386586","https://openalex.org/W2108185796","https://openalex.org/W2120500930","https://openalex.org/W2139625690","https://openalex.org/W2142610168","https://openalex.org/W2175048562","https://openalex.org/W2280601454","https://openalex.org/W2288286056","https://openalex.org/W2342426112","https://openalex.org/W2346049708","https://openalex.org/W2528482522","https://openalex.org/W2577476579","https://openalex.org/W2611384543","https://openalex.org/W2744067478","https://openalex.org/W2758621295","https://openalex.org/W2769863461","https://openalex.org/W2789248965","https://openalex.org/W2790060412","https://openalex.org/W2790368996","https://openalex.org/W2791440917","https://openalex.org/W2800076889","https://openalex.org/W2886418951","https://openalex.org/W2913416661","https://openalex.org/W2921886179","https://openalex.org/W2921945517","https://openalex.org/W2984477551","https://openalex.org/W2990700108","https://openalex.org/W3000264207","https://openalex.org/W3214506790","https://openalex.org/W4229595843","https://openalex.org/W6743205199","https://openalex.org/W6760304811","https://openalex.org/W6770511612","https://openalex.org/W6773390323"],"related_works":["https://openalex.org/W2540832666","https://openalex.org/W4286579627","https://openalex.org/W1851259350","https://openalex.org/W2139484866","https://openalex.org/W272184114","https://openalex.org/W2117747481","https://openalex.org/W2394282069","https://openalex.org/W2971609434","https://openalex.org/W2141726610","https://openalex.org/W4281672152"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"a":[3,64,70,78,136],"fractional-N":[4,56,112,144],"frequency":[5,88],"synthesizer":[6],"architecture":[7],"that":[8],"is":[9,25,48,122,130],"able":[10],"to":[11,27,81,102,135],"overcome":[12],"the":[13,86,111,143],"limitations":[14],"of":[15,73,85,105,139],"conventional":[16],"bang-bang":[17],"phase-locked":[18,59],"loops.":[19],"A":[20,38],"digital":[21],"frequencyerror":[22],"recovery":[23],"technique":[24],"introduced":[26],"enable":[28],"fast":[29],"lock,":[30],"at":[31,123],"no":[32],"significant":[33],"power":[34,128],"or":[35],"circuit":[36],"overhead.":[37],"digital-to-time":[39],"converter":[40],"design":[41],"with":[42],"reduced":[43],"static":[44],"and":[45,54,107,113],"dynamic":[46],"nonlinearity":[47],"proposed,":[49],"which":[50,133],"allows":[51],"for":[52,142],"low-jitter":[53],"low-spur":[55],"operation.":[57],"The":[58,93,117,126],"loop":[60],"(PLL),":[61],"implemented":[62],"in":[63,90,110],"standard":[65],"28-nm":[66],"CMOS":[67],"process,":[68],"occupies":[69],"core":[71],"area":[72],"0.17":[74],"mm2.":[75],"It":[76],"covers":[77],"1-GHz":[79],"hop":[80],"within":[82],"70":[83],"ppm":[84],"steady-state":[87],"value":[89],"18.55":[91],"\u03bcs.":[92],"prototype":[94],"achieves":[95],"an":[96],"rms-jitter":[97],"(integrated":[98],"from":[99],"1":[100],"kHz":[101],"100":[103],"MHz)":[104],"66.20":[106],"58.96":[108],"fs,":[109],"integer-N":[114],"modes,":[115],"respectively.":[116],"worst-case":[118],"in-band":[119],"fractional":[120],"spur":[121],"-61":[124],"dBc.":[125],"total":[127],"consumption":[129],"19.8":[131],"mW,":[132],"leads":[134],"jitter-power":[137],"figure-of-merit":[138],"-250.6":[140],"dB":[141],"channels.":[145]},"counts_by_year":[{"year":2026,"cited_by_count":11},{"year":2025,"cited_by_count":21},{"year":2024,"cited_by_count":21},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":16},{"year":2021,"cited_by_count":18}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}