{"id":"https://openalex.org/W3083765802","doi":"https://doi.org/10.1109/jssc.2020.3017775","title":"An 8.5-Gb/s/Pin 12-Gb LPDDR5 SDRAM With a Hybrid-Bank Architecture, Low Power, and Speed-Boosting Techniques","display_name":"An 8.5-Gb/s/Pin 12-Gb LPDDR5 SDRAM With a Hybrid-Bank Architecture, Low Power, and Speed-Boosting Techniques","publication_year":2020,"publication_date":"2020-09-02","ids":{"openalex":"https://openalex.org/W3083765802","doi":"https://doi.org/10.1109/jssc.2020.3017775","mag":"3083765802"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2020.3017775","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2020.3017775","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082530310","display_name":"Chang\u2010Kyo Lee","orcid":"https://orcid.org/0000-0001-6990-5869"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Chang-Kyo Lee","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040932333","display_name":"Hyung\u2010Joon Chi","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyung-Joon Chi","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103451137","display_name":"Jin\u2010Seok Heo","orcid":"https://orcid.org/0009-0001-3194-400X"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jin-Seok Heo","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100614689","display_name":"Jung Hwan Park","orcid":"https://orcid.org/0000-0002-8737-0084"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jung-Hwan Park","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5104033590","display_name":"Jin-Hun Jang","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jin-Hun Jang","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031251407","display_name":"Dongkeon Lee","orcid":"https://orcid.org/0000-0001-8596-8691"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dongkeon Lee","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087873340","display_name":"Jaehoon Jung","orcid":"https://orcid.org/0000-0002-9562-6828"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jae-Hoon Jung","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100370210","display_name":"Dong-Hun Lee","orcid":"https://orcid.org/0000-0003-1504-1385"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dong-Hun Lee","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100733983","display_name":"Dae-Hyun Kim","orcid":"https://orcid.org/0000-0003-0801-0230"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dae-Hyun Kim","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103143036","display_name":"Kihan Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kihan Kim","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023482624","display_name":"Sang-Yun Kim","orcid":"https://orcid.org/0000-0002-2952-5404"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sang-Yun Kim","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019358640","display_name":"Dukha Park","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dukha Park","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069859342","display_name":"Young-Il Lim","orcid":"https://orcid.org/0000-0002-5773-0296"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Youngil Lim","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101513494","display_name":"Geuntae Park","orcid":"https://orcid.org/0009-0008-4860-191X"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Geuntae Park","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100334442","display_name":"Seungjun Lee","orcid":"https://orcid.org/0009-0001-4314-0260"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seung-Jun Lee","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113835519","display_name":"Seungki Hong","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seungki Hong","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101811594","display_name":"Daehyun Kwon","orcid":"https://orcid.org/0000-0002-7025-5186"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dae-Hyun Kwon","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013617389","display_name":"Isak Hwang","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Isak Hwang","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072393272","display_name":"Byongwook Na","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Byongwook Na","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026716564","display_name":"Kyungryun Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kyung-Ryun Kim","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034816880","display_name":"Seouk-Kyu Choi","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seouk-Kyu Choi","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080198305","display_name":"Hye-In Choi","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyein Choi","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5097419735","display_name":"Hangi-Jung","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hangi-Jung","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067315298","display_name":"Wonil Bae","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Won-Il Bae","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014249580","display_name":"Jeong-Don Ihm","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jeong-Don Ihm","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000533800","display_name":"Seung-Jun Bae","orcid":"https://orcid.org/0000-0003-0077-7488"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seung-Jun Bae","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037648751","display_name":"Nam Sung Kim","orcid":"https://orcid.org/0000-0002-0442-5634"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Nam Sung Kim","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059804992","display_name":"Jung-Bae Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jung-Bae Lee","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":28,"corresponding_author_ids":["https://openalex.org/A5082530310"],"corresponding_institution_ids":["https://openalex.org/I2250650973"],"apc_list":null,"apc_paid":null,"fwci":0.7192,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.70521461,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"56","issue":"1","first_page":"212","last_page":"224"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/duty-cycle","display_name":"Duty cycle","score":0.6339559555053711},{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.5141273140907288},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.513731837272644},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.4903004467487335},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.47510871291160583},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4314819574356079},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.37317419052124023},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28975582122802734},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.26798081398010254},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.22590404748916626},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.18066048622131348},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1025354266166687}],"concepts":[{"id":"https://openalex.org/C199822604","wikidata":"https://www.wikidata.org/wiki/Q557120","display_name":"Duty cycle","level":3,"score":0.6339559555053711},{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.5141273140907288},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.513731837272644},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.4903004467487335},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.47510871291160583},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4314819574356079},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.37317419052124023},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28975582122802734},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.26798081398010254},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.22590404748916626},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.18066048622131348},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1025354266166687},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.0},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2020.3017775","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2020.3017775","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8299999833106995,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1964108470","https://openalex.org/W1977030506","https://openalex.org/W2015184411","https://openalex.org/W2089757817","https://openalex.org/W2094860990","https://openalex.org/W2103806711","https://openalex.org/W2108900661","https://openalex.org/W2132401365","https://openalex.org/W2132943370","https://openalex.org/W2136075142","https://openalex.org/W2165072326","https://openalex.org/W2166033101","https://openalex.org/W2168840467","https://openalex.org/W2291303685","https://openalex.org/W2594658991","https://openalex.org/W2792446208","https://openalex.org/W2793439489","https://openalex.org/W2894319355","https://openalex.org/W2905687955","https://openalex.org/W2996806983","https://openalex.org/W6644600904","https://openalex.org/W6672938105","https://openalex.org/W6675875204","https://openalex.org/W6679947235","https://openalex.org/W6696752871","https://openalex.org/W6749306622","https://openalex.org/W6750040433"],"related_works":["https://openalex.org/W4290802965","https://openalex.org/W97789383","https://openalex.org/W3087516072","https://openalex.org/W2727156679","https://openalex.org/W4289406402","https://openalex.org/W2364071303","https://openalex.org/W1483053255","https://openalex.org/W2896097814","https://openalex.org/W20221657","https://openalex.org/W2321648686"],"abstract_inverted_index":{"An":[0],"8.5-Gb/s/pin":[1],"(Gb/s)":[2],"12-Gb":[3],"LPDDR5":[4],"SDRAM":[5],"is":[6,68,94,188,225,234],"implemented":[7],"in":[8,160,272],"a":[9,15,20,86,117],"second-generation":[10],"10-nm":[11],"DRAM":[12],"process":[13],"with":[14,85,150],"hybrid-bank":[16],"architecture":[17],"that":[18,74],"provides":[19],"power-optimized":[21],"bank":[22,27,38],"solution":[23],"depending":[24],"on":[25,35],"the":[26,36,61,81,98,105,109,122,136,157,161,165,168,177,181,184,195,206,214,218,228,231,264,268],"modes":[28],"(4B/4BG,":[29],"16B-merged":[30],"bank,":[31],"8B-split":[32],"bank).":[33],"Based":[34],"specified":[37],"modes,":[39],"vertical":[40],"and":[41,48,144,200,242,260],"horizontal":[42],"skew-cancel":[43],"schemes":[44],"for":[45,103,256],"high":[46],"density":[47],"an":[49],"RBUS-based":[50],"DBI":[51,66,76],"ac":[52,67,77],"to":[53,73,121,172,213],"minimize":[54],"data":[55],"transition":[56],"are":[57,153],"newly":[58,154],"proposed.":[59],"Thus,":[60],"switching":[62],"power":[63],"of":[64,75,100,167,221,239,267],"RBUS":[65],"saved":[69,113],"by":[70,114,175,194,217,227],"8.9%":[71],"compared":[72,120],"\u201cOFF.\u201d":[78],"To":[79,126],"improve":[80],"rank":[82],"interleaving":[83],"efficiency":[84],"current":[87,110],"increase,":[88],"partially":[89],"enabled":[90,101],"WCK":[91,123,223],"(PE-WCK)":[92],"mode":[93],"proposed,":[95],"which":[96],"minimizes":[97],"number":[99],"circuits":[102],"maintaining":[104],"WCK2CK":[106],"synchronization.":[107],"Therefore,":[108],"can":[111],"be":[112],"62%":[115],"without":[116],"timing":[118],"constraint":[119],"always-ON":[124],"mode.":[125],"achieve":[127],"high-speed":[128],"operation":[129],"beyond":[130,209],"6.4":[131,210],"Gb/s,":[132],"speed-boosting":[133],"techniques,":[134],"namely,":[135],"two-step":[137,162],"duty":[138,163,169,186,196,201],"corrector,":[139,164],"active":[140],"resonant":[141],"load":[142],"(ARL),":[143],"one-tap":[145],"decision":[146],"feedback":[147,248,252],"equalizer":[148],"(DFE)":[149],"offset":[151,261,266],"calibration,":[152],"adopted.":[155],"In":[156,180],"coarse":[158],"step":[159],"value":[166],"error":[170,187],"decreases":[171],"below":[173],"5%":[174],"suppressing":[176],"dc":[178],"signal.":[179],"fine":[182],"step,":[183],"remaining":[185],"further":[189],"reduced":[190],"within":[191,235,274],"2.5":[192],"ps":[193,237],"cycle":[197,202],"monitor":[198],"(DCM)":[199],"adjustor":[203],"(DCA).":[204],"Moreover,":[205],"skew":[207,233],"increase":[208],"Gb/s":[211],"due":[212],"bandwidth":[215],"limit":[216],"heavy":[219],"loading":[220],"four-phase":[222,232],"signals":[224],"alleviated":[226],"ARL,":[229],"where":[230],"5":[236,275],"irrespective":[238],"process,":[240],"voltage,":[241],"temperature":[243],"(PVT)":[244],"variations.":[245],"The":[246],"direct":[247],"DFE":[249],"enables":[250],"fast":[251],"(<;":[253],"118":[254],"ps)":[255],"tap":[257],"coefficient":[258],"control,":[259],"calibration":[262],"reduces":[263],"three-sigma":[265],"four":[269],"dynamic":[270],"latches":[271],"DQ":[273],"mV.":[276]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
