{"id":"https://openalex.org/W2999932424","doi":"https://doi.org/10.1109/jssc.2019.2963005","title":"Liquid Silicon: A Nonvolatile Fully Programmable Processing-in-Memory Processor With Monolithically Integrated ReRAM","display_name":"Liquid Silicon: A Nonvolatile Fully Programmable Processing-in-Memory Processor With Monolithically Integrated ReRAM","publication_year":2020,"publication_date":"2020-01-14","ids":{"openalex":"https://openalex.org/W2999932424","doi":"https://doi.org/10.1109/jssc.2019.2963005","mag":"2999932424"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2019.2963005","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2019.2963005","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5076566818","display_name":"Yue Zha","orcid":"https://orcid.org/0000-0003-1111-7178"},"institutions":[{"id":"https://openalex.org/I79576946","display_name":"University of Pennsylvania","ror":"https://ror.org/00b30xv10","country_code":"US","type":"education","lineage":["https://openalex.org/I79576946"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Yue Zha","raw_affiliation_strings":["Department of Electrical and Systems Engineering, University of Pennsylvania, Philadelphia, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Systems Engineering, University of Pennsylvania, Philadelphia, USA","institution_ids":["https://openalex.org/I79576946"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078572020","display_name":"E. Nowak","orcid":"https://orcid.org/0009-0006-5217-8005"},"institutions":[{"id":"https://openalex.org/I4210150049","display_name":"Laboratoire d'\u00c9lectronique des Technologies de l'Information","ror":"https://ror.org/04mf0wv34","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I4210117989","https://openalex.org/I4210150049"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]},{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]},{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Etienne Nowak","raw_affiliation_strings":["CEA-Leti, Minatec Campus, Grenoble, France"],"affiliations":[{"raw_affiliation_string":"CEA-Leti, Minatec Campus, Grenoble, France","institution_ids":["https://openalex.org/I4210150049","https://openalex.org/I899635006","https://openalex.org/I106785703","https://openalex.org/I2738703131"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100626667","display_name":"Jing Li","orcid":"https://orcid.org/0000-0001-5139-938X"},"institutions":[{"id":"https://openalex.org/I79576946","display_name":"University of Pennsylvania","ror":"https://ror.org/00b30xv10","country_code":"US","type":"education","lineage":["https://openalex.org/I79576946"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jing Li","raw_affiliation_strings":["Department of Electrical and Systems Engineering, University of Pennsylvania, Philadelphia, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Systems Engineering, University of Pennsylvania, Philadelphia, USA","institution_ids":["https://openalex.org/I79576946"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5076566818"],"corresponding_institution_ids":["https://openalex.org/I79576946"],"apc_list":null,"apc_paid":null,"fwci":2.1577,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.87528345,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":99},"biblio":{"volume":"55","issue":"4","first_page":"908","last_page":"919"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.8355492353439331},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.6560184955596924},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6486721634864807},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6183726787567139},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5928689241409302},{"id":"https://openalex.org/keywords/non-volatile-random-access-memory","display_name":"Non-volatile random-access memory","score":0.459789514541626},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3951086699962616},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3898656666278839},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3877965211868286},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.3829251527786255},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.3690454959869385},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3628254532814026},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3604481816291809},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.27632325887680054},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1779022216796875}],"concepts":[{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.8355492353439331},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.6560184955596924},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6486721634864807},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6183726787567139},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5928689241409302},{"id":"https://openalex.org/C34172316","wikidata":"https://www.wikidata.org/wiki/Q499024","display_name":"Non-volatile random-access memory","level":5,"score":0.459789514541626},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3951086699962616},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3898656666278839},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3877965211868286},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.3829251527786255},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.3690454959869385},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3628254532814026},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3604481816291809},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.27632325887680054},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1779022216796875}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/jssc.2019.2963005","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2019.2963005","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},{"id":"pmh:oai:HAL:cea-04947527v1","is_oa":false,"landing_page_url":"https://cea.hal.science/cea-04947527","pdf_url":null,"source":{"id":"https://openalex.org/S4406922466","display_name":"SPIRE - Sciences Po Institutional REpository","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Journal of Solid-State Circuits, 2020, 55 (4), pp.908-919. &#x27E8;10.1109/JSSC.2019.2963005&#x27E9;","raw_type":"Journal articles"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G1543033097","display_name":null,"funder_award_id":"D16AP00122","funder_id":"https://openalex.org/F4320332180","funder_display_name":"Defense Advanced Research Projects Agency"}],"funders":[{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1526699078","https://openalex.org/W1567276300","https://openalex.org/W1749461670","https://openalex.org/W1977773606","https://openalex.org/W1997113918","https://openalex.org/W2130195589","https://openalex.org/W2148256155","https://openalex.org/W2167442631","https://openalex.org/W2292257019","https://openalex.org/W2402144811","https://openalex.org/W2536878608","https://openalex.org/W2583536366","https://openalex.org/W2744369623","https://openalex.org/W2745228312","https://openalex.org/W2788825665","https://openalex.org/W2790511620","https://openalex.org/W2791388986","https://openalex.org/W2899378420","https://openalex.org/W2899441512","https://openalex.org/W2914250845","https://openalex.org/W2953384591","https://openalex.org/W2963221280","https://openalex.org/W6713134421","https://openalex.org/W6728714155","https://openalex.org/W6742450443","https://openalex.org/W6748967906"],"related_works":["https://openalex.org/W2505369450","https://openalex.org/W2069344153","https://openalex.org/W1993178305","https://openalex.org/W1968537616","https://openalex.org/W2012997595","https://openalex.org/W2917388298","https://openalex.org/W229381242","https://openalex.org/W2543577874","https://openalex.org/W3209704453","https://openalex.org/W2024190459"],"abstract_inverted_index":{"The":[0],"slowdown":[1],"of":[2,48,61,112,132,163],"the":[3,8,16,45,58,65,97,101,113,172,181],"CMOS":[4],"technology":[5,24],"scaling,":[6],"and":[7,12,57,80,145,168],"trade-off":[9],"between":[10],"efficiency":[11,60,187],"flexibility":[13],"have":[14],"fueled":[15],"exploration":[17],"into":[18],"novel":[19],"architectures":[20],"with":[21],"emerging":[22],"post-CMOS":[23],"[e.g.,":[25,52],"resistive-RAM":[26],"(RRAM)].":[27],"In":[28,177],"this":[29],"article,":[30],"a":[31,129,159],"nonvolatile":[32,183],"fully":[33],"programmable":[34],"processing-in-memory":[35],"(PIM)":[36],"processor":[37],"named":[38],"Liquid":[39,69,98,122],"Silicon":[40,70,99,123],"is":[41,71,107],"demonstrated,":[42],"which":[43,84],"combines":[44],"superior":[46],"programmability":[47],"general-purpose":[49],"computing":[50,67,192],"devices":[51],"field-programmable":[53],"gate":[54],"array":[55],"(FPGA)]":[56],"high":[59,88],"domain-specific":[62,174],"accelerators.":[63,176],"Besides":[64],"general":[66,191],"applications,":[68,83],"particularly":[72],"well":[73],"suited":[74],"for":[75],"artificial":[76],"intelligence":[77],"(AI)/machine":[78],"learning":[79],"big":[81,155],"data":[82,156],"not":[85],"only":[86],"poses":[87],"computational/memory":[89],"demand":[90],"but":[91],"also":[92],"evolves":[93],"rapidly.":[94],"To":[95],"fabricate":[96],"chip,":[100],"HfO":[102],"<sub":[103],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[104],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sub>":[105],"RRAM":[106],"monolithically":[108],"integrated":[109],"on":[110],"top":[111],"commercial":[114],"130":[115],"nm":[116],"CMOS.":[117],"Our":[118],"measurement":[119],"confirms":[120],"that":[121],"chip":[124],"can":[125],"operate":[126],"reliably":[127],"at":[128,158],"low":[130],"voltage":[131,161],"650":[133],"mV.":[134],"It":[135],"achieves":[136],"60.9":[137],"TOPS/W":[138],"in":[139,148,185,190],"performing":[140,149],"neural":[141],"network":[142],"(NN)":[143],"inferences,":[144],"480":[146],"GOPS/W":[147],"content-based":[150],"similarity":[151],"search":[152],"(a":[153],"key":[154],"application)":[157],"nominal":[160],"supply":[162],"1.2":[164],"V,":[165],"showing":[166],"3\u00d7":[167,189],"100\u00d7":[169],"improvement":[170],"over":[171],"state-of-the-art":[173],"CMOS-/RRAM-based":[175],"addition,":[178],"it":[179],"outperforms":[180],"latest":[182],"FPGA":[184],"energy":[186],"by":[188],"applications.":[193]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":7},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}