{"id":"https://openalex.org/W2984668191","doi":"https://doi.org/10.1109/jssc.2019.2950154","title":"A Fractional-$N$ PLL With Space\u2013Time Averaging for Quantization Noise Reduction","display_name":"A Fractional-$N$ PLL With Space\u2013Time Averaging for Quantization Noise Reduction","publication_year":2019,"publication_date":"2019-11-12","ids":{"openalex":"https://openalex.org/W2984668191","doi":"https://doi.org/10.1109/jssc.2019.2950154","mag":"2984668191"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2019.2950154","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2019.2950154","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004439335","display_name":"Yanlong Zhang","orcid":"https://orcid.org/0000-0002-8717-3160"},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yanlong Zhang","raw_affiliation_strings":["School of Microelectronics, Xi\u2019 Jiaotong University, Xi\u2019an, China","School of Microelectronics, Xi' Jiaotong University, Xi'an, China"],"raw_orcid":"https://orcid.org/0000-0002-8717-3160","affiliations":[{"raw_affiliation_string":"School of Microelectronics, Xi\u2019 Jiaotong University, Xi\u2019an, China","institution_ids":["https://openalex.org/I87445476"]},{"raw_affiliation_string":"School of Microelectronics, Xi' Jiaotong University, Xi'an, China","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005496543","display_name":"Arindam Sanyal","orcid":"https://orcid.org/0000-0003-4045-6291"},"institutions":[{"id":"https://openalex.org/I63190737","display_name":"University at Buffalo, State University of New York","ror":"https://ror.org/01y64my43","country_code":"US","type":"education","lineage":["https://openalex.org/I63190737"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arindam Sanyal","raw_affiliation_strings":["Department of Electrical Engineering, The State University of New York at Buffalo, Buffalo, USA"],"raw_orcid":"https://orcid.org/0000-0003-4045-6291","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, The State University of New York at Buffalo, Buffalo, USA","institution_ids":["https://openalex.org/I63190737"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102377706","display_name":"Xueyi Yu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Xueyi Yu","raw_affiliation_strings":["Spintrol Ltd., Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Spintrol Ltd., Shanghai, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102719428","display_name":"Xing Quan","orcid":"https://orcid.org/0000-0002-6558-0718"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xing Quan","raw_affiliation_strings":["School of Mechano-electronic Engineering, Xidian University, Xi\u2019an, China","School of Mechano-electronic Engineering, Xidian University, Xi'an, China"],"raw_orcid":"https://orcid.org/0000-0002-6558-0718","affiliations":[{"raw_affiliation_string":"School of Mechano-electronic Engineering, Xidian University, Xi\u2019an, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"School of Mechano-electronic Engineering, Xidian University, Xi'an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012721846","display_name":"Kailin Wen","orcid":"https://orcid.org/0000-0002-3373-2561"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kailin Wen","raw_affiliation_strings":["School of Microelectronics, Xidian University, Xi\u2019an, China","School of Microelectronics, Xidian University, Xi'an, China"],"raw_orcid":"https://orcid.org/0000-0002-3373-2561","affiliations":[{"raw_affiliation_string":"School of Microelectronics, Xidian University, Xi\u2019an, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"School of Microelectronics, Xidian University, Xi'an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066653944","display_name":"Xiyuan Tang","orcid":"https://orcid.org/0000-0003-2181-9042"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiyuan Tang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, USA"],"raw_orcid":"https://orcid.org/0000-0003-2181-9042","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059541491","display_name":"Gang Jin","orcid":"https://orcid.org/0000-0002-6719-7755"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Gang Jin","raw_affiliation_strings":["School of Microelectronics, Xidian University, Xi\u2019an, China","School of Microelectronics, Xidian University, Xi'an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Xidian University, Xi\u2019an, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"School of Microelectronics, Xidian University, Xi'an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043300709","display_name":"Li Geng","orcid":"https://orcid.org/0000-0003-4002-9281"},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Li Geng","raw_affiliation_strings":["School of Microelectronics, Xi\u2019 Jiaotong University, Xi\u2019an, China","School of Microelectronics, Xi' Jiaotong University, Xi'an, China"],"raw_orcid":"https://orcid.org/0000-0003-4002-9281","affiliations":[{"raw_affiliation_string":"School of Microelectronics, Xi\u2019 Jiaotong University, Xi\u2019an, China","institution_ids":["https://openalex.org/I87445476"]},{"raw_affiliation_string":"School of Microelectronics, Xi' Jiaotong University, Xi'an, China","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070329670","display_name":"Nan Sun","orcid":"https://orcid.org/0000-0002-5536-8385"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nan Sun","raw_affiliation_strings":["Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, USA"],"raw_orcid":"https://orcid.org/0000-0002-5536-8385","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.4616,"has_fulltext":false,"cited_by_count":38,"citation_normalized_percentile":{"value":0.81721782,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":"55","issue":"3","first_page":"602","last_page":"614"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5418160557746887},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.5034703612327576},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.4740987718105316},{"id":"https://openalex.org/keywords/quantization","display_name":"Quantization (signal processing)","score":0.4644230902194977},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.45232850313186646},{"id":"https://openalex.org/keywords/frequency-divider","display_name":"Frequency divider","score":0.4422043263912201},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3870460093021393},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.31291043758392334},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.232750803232193},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14554473757743835},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12068885564804077}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5418160557746887},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.5034703612327576},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.4740987718105316},{"id":"https://openalex.org/C28855332","wikidata":"https://www.wikidata.org/wiki/Q198099","display_name":"Quantization (signal processing)","level":2,"score":0.4644230902194977},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.45232850313186646},{"id":"https://openalex.org/C74982907","wikidata":"https://www.wikidata.org/wiki/Q1455624","display_name":"Frequency divider","level":3,"score":0.4422043263912201},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3870460093021393},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.31291043758392334},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.232750803232193},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14554473757743835},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12068885564804077}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2019.2950154","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2019.2950154","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.6899999976158142,"display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G5372996981","display_name":null,"funder_award_id":"61904144","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":51,"referenced_works":["https://openalex.org/W1492984241","https://openalex.org/W1500373038","https://openalex.org/W1509148781","https://openalex.org/W1677884181","https://openalex.org/W1965174157","https://openalex.org/W1991121038","https://openalex.org/W1994936994","https://openalex.org/W2000068870","https://openalex.org/W2016690141","https://openalex.org/W2033675564","https://openalex.org/W2046776718","https://openalex.org/W2053188686","https://openalex.org/W2067936044","https://openalex.org/W2070413034","https://openalex.org/W2072192908","https://openalex.org/W2072937223","https://openalex.org/W2084894221","https://openalex.org/W2112664896","https://openalex.org/W2113025016","https://openalex.org/W2113662531","https://openalex.org/W2114953806","https://openalex.org/W2115434507","https://openalex.org/W2118721819","https://openalex.org/W2120258930","https://openalex.org/W2124354408","https://openalex.org/W2132876868","https://openalex.org/W2136246702","https://openalex.org/W2145830629","https://openalex.org/W2146298723","https://openalex.org/W2150524153","https://openalex.org/W2150912637","https://openalex.org/W2158180061","https://openalex.org/W2160579191","https://openalex.org/W2166624160","https://openalex.org/W2167284852","https://openalex.org/W2172440946","https://openalex.org/W2177410627","https://openalex.org/W2177833654","https://openalex.org/W2180973527","https://openalex.org/W2319202377","https://openalex.org/W2410273639","https://openalex.org/W2476112607","https://openalex.org/W2789364534","https://openalex.org/W2792205995","https://openalex.org/W2884049905","https://openalex.org/W2897766837","https://openalex.org/W2901368319","https://openalex.org/W2920848205","https://openalex.org/W2922052506","https://openalex.org/W3142075743","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2121182846","https://openalex.org/W2155789024","https://openalex.org/W2315668284","https://openalex.org/W3213608175","https://openalex.org/W2109491806","https://openalex.org/W3117675750","https://openalex.org/W1994021281","https://openalex.org/W2139484866","https://openalex.org/W2347235883","https://openalex.org/W2017031079"],"abstract_inverted_index":{"This":[0],"article":[1,81],"presents":[2],"a":[3,23,56,69,84,111,140],"space\u2013time":[4],"averaging":[5,35,89],"technique":[6,121],"that":[7,118],"can":[8,16,36],"realize":[9],"instantaneous":[10],"fractional":[11,57],"frequency":[12],"division,":[13],"and":[14,68,94,128,134],"thus,":[15],"significantly":[17],"reduce":[18,76],"the":[19,77,119,123,132,143],"quantization":[20],"error":[21],"in":[22,46,110],"fractional-":[24,100],"<inline-formula":[25,58,101],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[26,59,102],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[27,60,103],"<tex-math":[28,61,104],"notation=\"LaTeX\">$N$":[29,105],"</tex-math></inline-formula>":[30,65,106],"phase-locked":[31],"loop":[32],"(PLL).":[33],"Spatial":[34],"be":[37],"achieved":[38],"by":[39,54,126],"using":[40,55,90],"an":[41],"array":[42],"of":[43,142],"dividers":[44],"running":[45],"parallel.":[47],"Their":[48],"different":[49],"division":[50],"ratios":[51],"are":[52],"generated":[53],"notation=\"LaTeX\">$\\Delta":[62],"\\Sigma":[63],"$":[64],"modulator":[66],"(DSM)":[67],"dynamic":[70],"element":[71],"matching":[72],"(DEM)":[73],"block.":[74],"To":[75],"divider":[78,93],"power,":[79],"this":[80],"also":[82],"proposes":[83],"way":[85],"to":[86,139,149],"achieve":[87],"spatial":[88],"only":[91],"one":[92],"phase":[95,124],"selection.":[96],"A":[97],"prototype":[98],"2.4-GHz":[99],"PLL":[107],"is":[108],"implemented":[109],"40-nm":[112],"CMOS":[113],"process.":[114],"Measurement":[115],"results":[116],"show":[117],"proposed":[120],"reduces":[122],"noise":[125],"10":[127],"21":[129],"dB":[130],"at":[131],"1-":[133],"10-MHz":[135],"offset,":[136],"respectively,":[137],"leading":[138],"reduction":[141],"integrated":[144],"rms":[145],"jitter":[146],"from":[147],"9.55":[148],"2.26":[150],"ps.":[151]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":9},{"year":2024,"cited_by_count":8},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":9},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":3}],"updated_date":"2026-07-15T18:14:33.161393","created_date":"2025-10-10T00:00:00"}
