{"id":"https://openalex.org/W2975185022","doi":"https://doi.org/10.1109/jssc.2019.2939663","title":"A 31-$\\mu$ W, 148-fs Step, 9-bit Capacitor-DAC-Based Constant-Slope Digital-to-Time Converter in 28-nm CMOS","display_name":"A 31-$\\mu$ W, 148-fs Step, 9-bit Capacitor-DAC-Based Constant-Slope Digital-to-Time Converter in 28-nm CMOS","publication_year":2019,"publication_date":"2019-09-27","ids":{"openalex":"https://openalex.org/W2975185022","doi":"https://doi.org/10.1109/jssc.2019.2939663","mag":"2975185022"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2019.2939663","is_oa":true,"landing_page_url":"https://doi.org/10.1109/jssc.2019.2939663","pdf_url":"https://ieeexplore.ieee.org/ielx7/4/8880462/08850049.pdf","source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://ieeexplore.ieee.org/ielx7/4/8880462/08850049.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051366940","display_name":"Peng Chen","orcid":"https://orcid.org/0000-0002-2872-9421"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Peng Chen","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University College Dublin, Dublin, Ireland"],"raw_orcid":"https://orcid.org/0000-0002-2872-9421","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University College Dublin, Dublin, Ireland","institution_ids":["https://openalex.org/I100930933"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035373707","display_name":"Feifei Zhang","orcid":"https://orcid.org/0000-0002-9862-6671"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Feifei Zhang","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University College Dublin, Dublin, Ireland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University College Dublin, Dublin, Ireland","institution_ids":["https://openalex.org/I100930933"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035043241","display_name":"Zhirui Zong","orcid":"https://orcid.org/0000-0002-2681-0795"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Zhirui Zong","raw_affiliation_strings":["Department of Microelectronics, Delft University of Technology, Delft, Netherlands"],"raw_orcid":"https://orcid.org/0000-0002-2681-0795","affiliations":[{"raw_affiliation_string":"Department of Microelectronics, Delft University of Technology, Delft, Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027886099","display_name":"Suoping Hu","orcid":"https://orcid.org/0000-0001-9125-9007"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Suoping Hu","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University College Dublin, Dublin, Ireland"],"raw_orcid":"https://orcid.org/0000-0001-9125-9007","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University College Dublin, Dublin, Ireland","institution_ids":["https://openalex.org/I100930933"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050565374","display_name":"Teerachot Siriburanon","orcid":"https://orcid.org/0000-0003-1658-9596"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Teerachot Siriburanon","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University College Dublin, Dublin, Ireland"],"raw_orcid":"https://orcid.org/0000-0003-1658-9596","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University College Dublin, Dublin, Ireland","institution_ids":["https://openalex.org/I100930933"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027017637","display_name":"Robert Bogdan Staszewski","orcid":"https://orcid.org/0000-0001-9848-1129"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Robert Bogdan Staszewski","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University College Dublin, Dublin, Ireland"],"raw_orcid":"https://orcid.org/0000-0001-9848-1129","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University College Dublin, Dublin, Ireland","institution_ids":["https://openalex.org/I100930933"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.8943,"has_fulltext":true,"cited_by_count":50,"citation_normalized_percentile":{"value":0.85029724,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":97,"max":99},"biblio":{"volume":"54","issue":"11","first_page":"3075","last_page":"3085"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/differential-nonlinearity","display_name":"Differential nonlinearity","score":0.9099446535110474},{"id":"https://openalex.org/keywords/integral-nonlinearity","display_name":"Integral nonlinearity","score":0.8237070441246033},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.7379067540168762},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.7234228253364563},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6528449058532715},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.5225017666816711},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.46300390362739563},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.45113712549209595},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4380131661891937},{"id":"https://openalex.org/keywords/least-significant-bit","display_name":"Least significant bit","score":0.42946115136146545},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.4282422661781311},{"id":"https://openalex.org/keywords/digital-to-analog-converter","display_name":"Digital-to-analog converter","score":0.42319682240486145},{"id":"https://openalex.org/keywords/constant","display_name":"Constant (computer programming)","score":0.4225974977016449},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.414878249168396},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.33380091190338135},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3043782114982605},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.2813200056552887},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2306385636329651},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.21325922012329102},{"id":"https://openalex.org/keywords/electrode","display_name":"Electrode","score":0.11890706419944763},{"id":"https://openalex.org/keywords/quantum-mechanics","display_name":"Quantum mechanics","score":0.08363249897956848},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.07447120547294617}],"concepts":[{"id":"https://openalex.org/C71217194","wikidata":"https://www.wikidata.org/wiki/Q575958","display_name":"Differential nonlinearity","level":3,"score":0.9099446535110474},{"id":"https://openalex.org/C130829357","wikidata":"https://www.wikidata.org/wiki/Q1665386","display_name":"Integral nonlinearity","level":4,"score":0.8237070441246033},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.7379067540168762},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.7234228253364563},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6528449058532715},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.5225017666816711},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.46300390362739563},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.45113712549209595},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4380131661891937},{"id":"https://openalex.org/C4305246","wikidata":"https://www.wikidata.org/wiki/Q3885225","display_name":"Least significant bit","level":2,"score":0.42946115136146545},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.4282422661781311},{"id":"https://openalex.org/C2779879419","wikidata":"https://www.wikidata.org/wiki/Q210863","display_name":"Digital-to-analog converter","level":3,"score":0.42319682240486145},{"id":"https://openalex.org/C2777027219","wikidata":"https://www.wikidata.org/wiki/Q1284190","display_name":"Constant (computer programming)","level":2,"score":0.4225974977016449},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.414878249168396},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.33380091190338135},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3043782114982605},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.2813200056552887},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2306385636329651},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.21325922012329102},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.11890706419944763},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.08363249897956848},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.07447120547294617},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/jssc.2019.2939663","is_oa":true,"landing_page_url":"https://doi.org/10.1109/jssc.2019.2939663","pdf_url":"https://ieeexplore.ieee.org/ielx7/4/8880462/08850049.pdf","source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},{"id":"pmh:oai:repository.hkust.edu.hk:1783.1-121636","is_oa":false,"landing_page_url":"https://repository.hkust.edu.hk/ir/Record/1783.1-121636","pdf_url":null,"source":{"id":"https://openalex.org/S4306401796","display_name":"Rare & Special e-Zone (The Hong Kong University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I200769079","host_organization_name":"Hong Kong University of Science and Technology","host_organization_lineage":["https://openalex.org/I200769079"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"},{"id":"pmh:oai:tudelft.nl:uuid:abb92aa0-b726-4991-9078-324d9725a972","is_oa":true,"landing_page_url":"http://resolver.tudelft.nl/uuid:abb92aa0-b726-4991-9078-324d9725a972","pdf_url":null,"source":{"id":"https://openalex.org/S4306400906","display_name":"Research Repository (Delft University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I98358874","host_organization_name":"Delft University of Technology","host_organization_lineage":["https://openalex.org/I98358874"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"journal article"}],"best_oa_location":{"id":"doi:10.1109/jssc.2019.2939663","is_oa":true,"landing_page_url":"https://doi.org/10.1109/jssc.2019.2939663","pdf_url":"https://ieeexplore.ieee.org/ielx7/4/8880462/08850049.pdf","source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G5906654117","display_name":null,"funder_award_id":"14/RP/I2921","funder_id":"https://openalex.org/F4320320847","funder_display_name":"Science Foundation Ireland"}],"funders":[{"id":"https://openalex.org/F4320320847","display_name":"Science Foundation Ireland","ror":"https://ror.org/0271asj38"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2975185022.pdf","grobid_xml":"https://content.openalex.org/works/W2975185022.grobid-xml"},"referenced_works_count":31,"referenced_works":["https://openalex.org/W1487984748","https://openalex.org/W1566916904","https://openalex.org/W1571758417","https://openalex.org/W1940483669","https://openalex.org/W1989376602","https://openalex.org/W1998183190","https://openalex.org/W2008857137","https://openalex.org/W2028941857","https://openalex.org/W2036880312","https://openalex.org/W2108324407","https://openalex.org/W2110675623","https://openalex.org/W2111186324","https://openalex.org/W2117662511","https://openalex.org/W2120500930","https://openalex.org/W2126344173","https://openalex.org/W2163630970","https://openalex.org/W2164819109","https://openalex.org/W2168413616","https://openalex.org/W2195134145","https://openalex.org/W2342426112","https://openalex.org/W2516199239","https://openalex.org/W2611384543","https://openalex.org/W2778427863","https://openalex.org/W2789248965","https://openalex.org/W2801792298","https://openalex.org/W2888480449","https://openalex.org/W2908054846","https://openalex.org/W3142120744","https://openalex.org/W6652604816","https://openalex.org/W6659660600","https://openalex.org/W6748963127"],"related_works":["https://openalex.org/W2536327642","https://openalex.org/W2170169594","https://openalex.org/W2135282839","https://openalex.org/W1646646757","https://openalex.org/W2804896529","https://openalex.org/W1907199348","https://openalex.org/W2131872006","https://openalex.org/W4385933671","https://openalex.org/W2166674979","https://openalex.org/W1984454906"],"abstract_inverted_index":{"This":[0],"article":[1],"proposes":[2],"a":[3,12,38,66,76,83],"power-efficient":[4],"highly":[5],"linear":[6],"capacitor-array-based":[7],"digital-to-time":[8],"converter":[9,20],"(DTC)":[10],"using":[11],"charge":[13],"redistribution":[14],"constant-slope":[15],"approach.":[16],"A":[17],"fringe-capacitor-based":[18],"digital-to-analog":[19],"(C-DAC)":[21],"array":[22],"is":[23,45],"used":[24],"to":[25,37],"regulate":[26],"the":[27,32],"starting":[28],"supply":[29,68],"voltage":[30],"of":[31,79],"constant":[33],"discharging":[34],"slope":[35],"fed":[36],"fixed-threshold":[39],"comparator.":[40],"The":[41,52,86],"DTC":[42,54],"operation":[43],"mechanism":[44],"analyzed":[46],"and":[47,91],"design":[48],"tradeoffs":[49],"are":[50,95],"investigated.":[51],"proposed":[53],"consumes":[55],"merely":[56],"31":[57],"<inline-formula":[58],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[59],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[60],"<tex-math":[61],"notation=\"LaTeX\">$\\mu":[62],"\\text{W}$":[63],"</tex-math></inline-formula>":[64],"from":[65],"1-V":[67],"when":[69],"clocked":[70],"at":[71],"40":[72],"MHz,":[73],"while":[74],"achieving":[75],"fine":[77],"resolution":[78],"148":[80],"fs":[81],"over":[82],"9-bit":[84],"range.":[85],"measured":[87],"differential":[88],"nonlinearity":[89,93],"(DNL)":[90],"integral":[92],"(INL)":[94],"0.96/1.07":[96],"LSB.":[97]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":10},{"year":2024,"cited_by_count":13},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":8},{"year":2021,"cited_by_count":7},{"year":2020,"cited_by_count":4}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}