{"id":"https://openalex.org/W2996806983","doi":"https://doi.org/10.1109/jssc.2019.2938396","title":"A 7.5 Gb/s/pin 8-Gb LPDDR5 SDRAM With Various High-Speed and Low-Power Techniques","display_name":"A 7.5 Gb/s/pin 8-Gb LPDDR5 SDRAM With Various High-Speed and Low-Power Techniques","publication_year":2019,"publication_date":"2019-12-27","ids":{"openalex":"https://openalex.org/W2996806983","doi":"https://doi.org/10.1109/jssc.2019.2938396","mag":"2996806983"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2019.2938396","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2019.2938396","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043251068","display_name":"K. S. Ha","orcid":"https://orcid.org/0000-0002-2680-3675"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Kyung-Soo Ha","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005648490","display_name":"Seungseob Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seungseob Lee","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060289139","display_name":"Youn-sik Park","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Youn-Sik Park","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112494676","display_name":"Hyuck\u2010Joon Kwon","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyuck-Joon Kwon","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101022438","display_name":"Tae-Young Oh","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Tae-Young Oh","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044163433","display_name":"Young\u2010Soo Sohn","orcid":"https://orcid.org/0000-0002-6068-0592"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Young-Soo Sohn","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000533800","display_name":"Seung-Jun Bae","orcid":"https://orcid.org/0000-0003-0077-7488"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seung-Jun Bae","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004059216","display_name":"Kwang\u2010Il Park","orcid":"https://orcid.org/0000-0002-0199-8090"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kwang-Il Park","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059804992","display_name":"Jung-Bae Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jung-Bae Lee","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082530310","display_name":"Chang\u2010Kyo Lee","orcid":"https://orcid.org/0000-0001-6990-5869"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Chang-Kyo Lee","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031251407","display_name":"Dongkeon Lee","orcid":"https://orcid.org/0000-0001-8596-8691"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dongkeon Lee","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011104036","display_name":"Dae\u2010Sik Moon","orcid":"https://orcid.org/0000-0003-4200-5064"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Daesik Moon","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110647394","display_name":"Hyong-Ryol Hwang","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyong-Ryol Hwang","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019358640","display_name":"Dukha Park","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dukha Park","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5119929924","display_name":"Young-Hwa Kim","orcid":"https://orcid.org/0000-0003-1283-6756"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Young-Hwa Kim","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091134994","display_name":"Young Hoon Son","orcid":"https://orcid.org/0000-0002-6230-5067"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Young Hoon Son","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072393272","display_name":"Byongwook Na","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Byongwook Na","raw_affiliation_strings":["Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea"],"affiliations":[{"raw_affiliation_string":"Memory Division, DRAM Design Team, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":17,"corresponding_author_ids":["https://openalex.org/A5043251068"],"corresponding_institution_ids":["https://openalex.org/I2250650973"],"apc_list":null,"apc_paid":null,"fwci":0.7154,"has_fulltext":false,"cited_by_count":23,"citation_normalized_percentile":{"value":0.72563333,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":93,"max":99},"biblio":{"volume":"55","issue":"1","first_page":"157","last_page":"166"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.8523341417312622},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5631874799728394},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.49552786350250244},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.4825836718082428},{"id":"https://openalex.org/keywords/frequency-scaling","display_name":"Frequency scaling","score":0.43149039149284363},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.41634422540664673},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4105229377746582},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4009610116481781},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3760293126106262},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.359996497631073},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.31918275356292725},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2345728874206543},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.11638244986534119},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.0995587408542633},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.078375905752182}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.8523341417312622},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5631874799728394},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.49552786350250244},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.4825836718082428},{"id":"https://openalex.org/C157742956","wikidata":"https://www.wikidata.org/wiki/Q3237776","display_name":"Frequency scaling","level":3,"score":0.43149039149284363},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.41634422540664673},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4105229377746582},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4009610116481781},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3760293126106262},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.359996497631073},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.31918275356292725},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2345728874206543},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.11638244986534119},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0995587408542633},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.078375905752182},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2019.2938396","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2019.2938396","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8100000023841858}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W2027886943","https://openalex.org/W2081250279","https://openalex.org/W2095658739","https://openalex.org/W2099195220","https://openalex.org/W2132943370","https://openalex.org/W2133079932","https://openalex.org/W2179530124","https://openalex.org/W2291303685","https://openalex.org/W2593688479","https://openalex.org/W2594658991","https://openalex.org/W2791561716","https://openalex.org/W2792446208","https://openalex.org/W2793439489","https://openalex.org/W2922009866","https://openalex.org/W4242754029","https://openalex.org/W6657195824","https://openalex.org/W6675045894","https://openalex.org/W6760490715"],"related_works":["https://openalex.org/W4293430534","https://openalex.org/W2342813629","https://openalex.org/W3150934690","https://openalex.org/W2335743642","https://openalex.org/W4297812927","https://openalex.org/W2800412005","https://openalex.org/W1976244802","https://openalex.org/W1992487929","https://openalex.org/W2083934844","https://openalex.org/W4386903460"],"abstract_inverted_index":{"A":[0,59],"7.5":[1,159],"Gb/s/pin":[2],"8-Gb":[3],"LPDDR5":[4,154],"SDRAM":[5],"is":[6,36,42,49,106,150,192],"implemented":[7],"in":[8,55,196],"a":[9,31,45,56,98,135,171],"1\u00d7":[10],"nm":[11],"DRAM":[12,155],"process.":[13],"Various":[14],"techniques":[15,62],"are":[16,63,94],"applied":[17],"to":[18,39,51,108,158,184],"achieve":[19],"higher":[20],"bandwidth":[21],"and":[22,44,111,115,145,167,175,181,189],"lower":[23],"power":[24,40,114,177,191],"than":[25],"LPDDR4X.":[26],"To":[27,68],"increase":[28],"data":[29,123],"rate,":[30],"WCK":[32],"clocking":[33],"scheme":[34,138],"that":[35,93,139],"less":[37],"vulnerable":[38],"noise":[41,54],"adopted":[43,107],"non-target":[46],"ODT":[47],"mode":[48,77],"proposed":[50,64,153],"reduce":[52,69,109],"reflection":[53],"two-rank":[57],"system.":[58,173],"couple":[60],"of":[61,84],"for":[65,129],"saving":[66],"power.":[67,133],"self-refresh":[70,99,190],"power,":[71],"this":[72],"chip":[73],"supports":[74],"deep":[75],"sleep":[76],"(DSM).":[78],"In":[79],"DSM,":[80],"the":[81],"leakage":[82],"current":[83],"internal":[85,90,122],"voltages":[86],"decreases":[87],"by":[88,179,194],"disabling":[89],"voltage":[91,102],"generators":[92],"not":[95],"related":[96],"with":[97],"operation.":[100],"Dynamic":[101],"frequency":[103],"scaling":[104],"(DVFS)":[105],"read":[110],"write":[112,131,176],"operation":[113,132],"when":[116],"writing":[117],"all":[118],"zeros":[119],"data,":[120],"an":[121,162],"copy":[124],"function":[125],"can":[126],"be":[127],"used":[128],"reducing":[130],"Last,":[134],"ZQ":[136,142,148],"calibration":[137,149],"shares":[140],"one":[141],"resistor":[143],"(RZQ)":[144],"automatically":[146],"executes":[147],"presented.":[151],"The":[152],"operates":[156],"up":[157],"Gb/s":[160,169],"on":[161,170],"automatic":[163],"test":[164],"equipment":[165],"(ATE)":[166],"6.4":[168],"prototype":[172],"Read":[174],"decrease":[178],"21%":[180],"33%":[182],"compared":[183],"LPDDR4X":[185],"at":[186],"4.266":[187],"Gb/s,":[188],"reduced":[193],"25%":[195],"DSM.":[197]},"counts_by_year":[{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":7},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
