{"id":"https://openalex.org/W2946097807","doi":"https://doi.org/10.1109/jssc.2019.2904884","title":"A 2.5\u20135.75-GHz Ring-Based Injection-Locked Clock Multiplier With Background-Calibrated Reference Frequency Doubler","display_name":"A 2.5\u20135.75-GHz Ring-Based Injection-Locked Clock Multiplier With Background-Calibrated Reference Frequency Doubler","publication_year":2019,"publication_date":"2019-05-21","ids":{"openalex":"https://openalex.org/W2946097807","doi":"https://doi.org/10.1109/jssc.2019.2904884","mag":"2946097807"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2019.2904884","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2019.2904884","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045287571","display_name":"Ahmed Elkholy","orcid":"https://orcid.org/0000-0002-3252-8585"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Ahmed Elkholy","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Illinois at Urbana\u2013Champaign, Urbana, IL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois at Urbana\u2013Champaign, Urbana, IL, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030380159","display_name":"Daniel Coombs","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Daniel Coombs","raw_affiliation_strings":["Ocient Inc., Chicago, IL, USA"],"affiliations":[{"raw_affiliation_string":"Ocient Inc., Chicago, IL, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014466863","display_name":"Romesh Kumar Nandwana","orcid":"https://orcid.org/0000-0003-0339-5792"},"institutions":[{"id":"https://openalex.org/I135428043","display_name":"Cisco Systems (United States)","ror":"https://ror.org/03yt1ez60","country_code":"US","type":"company","lineage":["https://openalex.org/I135428043"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Romesh Kumar Nandwana","raw_affiliation_strings":["Cisco Systems, Allentown, PA, USA"],"affiliations":[{"raw_affiliation_string":"Cisco Systems, Allentown, PA, USA","institution_ids":["https://openalex.org/I135428043"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070838670","display_name":"Ahmed Elmallah","orcid":"https://orcid.org/0000-0002-0285-9957"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ahmed Elmallah","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Illinois at Urbana\u2013Champaign, Urbana, IL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois at Urbana\u2013Champaign, Urbana, IL, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036789252","display_name":"Pavan Kumar Hanumolu","orcid":"https://orcid.org/0000-0002-6233-8934"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pavan Kumar Hanumolu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Illinois at Urbana\u2013Champaign, Urbana, IL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois at Urbana\u2013Champaign, Urbana, IL, USA","institution_ids":["https://openalex.org/I157725225"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5045287571"],"corresponding_institution_ids":["https://openalex.org/I157725225"],"apc_list":null,"apc_paid":null,"fwci":3.5768,"has_fulltext":false,"cited_by_count":49,"citation_normalized_percentile":{"value":0.93389793,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":"54","issue":"7","first_page":"2049","last_page":"2058"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.824855625629425},{"id":"https://openalex.org/keywords/ring-oscillator","display_name":"Ring oscillator","score":0.643355131149292},{"id":"https://openalex.org/keywords/frequency-multiplier","display_name":"Frequency multiplier","score":0.6297779083251953},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.5319443345069885},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.5210984945297241},{"id":"https://openalex.org/keywords/duty-cycle","display_name":"Duty cycle","score":0.4896572232246399},{"id":"https://openalex.org/keywords/delay-line-oscillator","display_name":"Delay line oscillator","score":0.4877703785896301},{"id":"https://openalex.org/keywords/cpu-multiplier","display_name":"CPU multiplier","score":0.45701056718826294},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.4437708556652069},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.42936092615127563},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.418615460395813},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.4120199382305145},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.39626234769821167},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.36591991782188416},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3579264283180237},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.20276027917861938},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1998535692691803},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.18417510390281677},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.18388798832893372},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.15060579776763916}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.824855625629425},{"id":"https://openalex.org/C104111718","wikidata":"https://www.wikidata.org/wiki/Q2153973","display_name":"Ring oscillator","level":3,"score":0.643355131149292},{"id":"https://openalex.org/C146002875","wikidata":"https://www.wikidata.org/wiki/Q1074289","display_name":"Frequency multiplier","level":3,"score":0.6297779083251953},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.5319443345069885},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.5210984945297241},{"id":"https://openalex.org/C199822604","wikidata":"https://www.wikidata.org/wiki/Q557120","display_name":"Duty cycle","level":3,"score":0.4896572232246399},{"id":"https://openalex.org/C26907483","wikidata":"https://www.wikidata.org/wiki/Q5253479","display_name":"Delay line oscillator","level":4,"score":0.4877703785896301},{"id":"https://openalex.org/C125576049","wikidata":"https://www.wikidata.org/wiki/Q2246273","display_name":"CPU multiplier","level":5,"score":0.45701056718826294},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.4437708556652069},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.42936092615127563},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.418615460395813},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.4120199382305145},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.39626234769821167},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.36591991782188416},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3579264283180237},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.20276027917861938},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1998535692691803},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.18417510390281677},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.18388798832893372},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.15060579776763916}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2019.2904884","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2019.2904884","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8100000023841858,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320309065","display_name":"Analog Devices","ror":"https://ror.org/01545pm61"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W1948778041","https://openalex.org/W2001782539","https://openalex.org/W2015397896","https://openalex.org/W2051547299","https://openalex.org/W2066871406","https://openalex.org/W2069335439","https://openalex.org/W2072937223","https://openalex.org/W2093875124","https://openalex.org/W2094999635","https://openalex.org/W2100957399","https://openalex.org/W2120500930","https://openalex.org/W2121854746","https://openalex.org/W2134899771","https://openalex.org/W2137091925","https://openalex.org/W2161139924","https://openalex.org/W2172477025","https://openalex.org/W2294056064","https://openalex.org/W2294575823","https://openalex.org/W2295656041","https://openalex.org/W2410273639","https://openalex.org/W2462522525","https://openalex.org/W2476112607","https://openalex.org/W2533183268","https://openalex.org/W2567368644","https://openalex.org/W2594705442","https://openalex.org/W2736004295","https://openalex.org/W2754812974","https://openalex.org/W2792678133","https://openalex.org/W2801331088","https://openalex.org/W3142120744","https://openalex.org/W6674177514","https://openalex.org/W6680540142"],"related_works":["https://openalex.org/W2109091204","https://openalex.org/W4230767006","https://openalex.org/W2377552037","https://openalex.org/W2528504743","https://openalex.org/W2893412776","https://openalex.org/W2164559095","https://openalex.org/W3036909566","https://openalex.org/W4387426686","https://openalex.org/W2380150769","https://openalex.org/W2310418070"],"abstract_inverted_index":{"A":[0,63],"low-jitter,":[1],"low-power":[2],"ring":[3],"oscillator":[4],"(RO)-based":[5],"injection-locked":[6],"clock":[7,105],"multiplier":[8],"(ILCM)":[9],"is":[10,67],"presented.":[11],"It":[12],"employs":[13],"a":[14,26,39,53,113,146],"background-calibrated":[15],"reference":[16,115],"frequency":[17,50],"doubler":[18],"to":[19,31,44,69,136],"increase":[20],"the":[21,47,72,84,88,107,137],"RO":[22,36],"noise":[23],"suppression":[24,34],"bandwidth,":[25],"digital":[27,40],"delay-locked":[28],"loop":[29,42],"(DLL)":[30],"achieve":[32],"second-order":[33],"of":[35,95,109,125,132,142],"noise,":[37],"and":[38,51,59,101],"frequency-tracking":[41],"(FTL)":[43],"continuously":[45],"tune":[46],"oscillator's":[48],"free-running":[49],"ensure":[52],"robust":[54],"operation":[55],"across":[56],"process,":[57,87],"voltage,":[58],"temperature":[60],"(PVT)":[61],"variations.":[62],"least-mean-square":[64],"(LMS)":[65],"algorithm":[66],"used":[68],"accurately":[70],"cancel":[71],"deterministic":[73],"jitter":[74,124],"(DJ)":[75],"caused":[76],"by":[77],"input":[78],"duty":[79],"cycle":[80],"errors.":[81],"Fabricated":[82],"in":[83,106],"65-nm":[85],"CMOS":[86],"prototype":[89],"ILCM":[90,148],"occupies":[91],"an":[92,103,122],"active":[93],"area":[94],"0.09":[96],"mm":[97],"<sup":[98],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[99],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[100],"generates":[102],"output":[104],"range":[108],"2.5-5.75":[110],"GHz":[111],"using":[112],"125-MHz":[114],"clock.":[116],"At":[117],"5":[118],"GHz,":[119],"it":[120],"achieves":[121],"integrated":[123],"335":[126],"fsrms,":[127],"while":[128],"consuming":[129],"5.3":[130],"mW":[131],"power.":[133],"This":[134],"translates":[135],"best":[138],"reported":[139],"figure-of-merit":[140],"(FoM)":[141],"-242.4":[143],"dB":[144],"for":[145],"ring-based":[147],"at":[149],"this":[150],"high":[151],"frequency.":[152]},"counts_by_year":[{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":7},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":15},{"year":2021,"cited_by_count":7},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
