{"id":"https://openalex.org/W2892026392","doi":"https://doi.org/10.1109/jssc.2018.2865457","title":"A 2.56-mm<sup>2</sup> 718GOPS Configurable Spiking Convolutional Sparse Coding Accelerator in 40-nm CMOS","display_name":"A 2.56-mm<sup>2</sup> 718GOPS Configurable Spiking Convolutional Sparse Coding Accelerator in 40-nm CMOS","publication_year":2018,"publication_date":"2018-09-03","ids":{"openalex":"https://openalex.org/W2892026392","doi":"https://doi.org/10.1109/jssc.2018.2865457","mag":"2892026392"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2018.2865457","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2018.2865457","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041944874","display_name":"Chester Liu","orcid":"https://orcid.org/0000-0003-0115-9630"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Chester Liu","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011111894","display_name":"Sung-Gun Cho","orcid":"https://orcid.org/0000-0001-6934-6956"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sung-Gun Cho","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038110244","display_name":"Zhengya Zhang","orcid":"https://orcid.org/0000-0001-5963-9018"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhengya Zhang","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5041944874"],"corresponding_institution_ids":["https://openalex.org/I27837315"],"apc_list":null,"apc_paid":null,"fwci":0.2575,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.57337213,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":"53","issue":"10","first_page":"2818","last_page":"2827"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13114","display_name":"Image Processing Techniques and Applications","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7118690609931946},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5832617878913879},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5633624792098999},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.5510224103927612},{"id":"https://openalex.org/keywords/convolution","display_name":"Convolution (computer science)","score":0.5358959436416626},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.5104774236679077},{"id":"https://openalex.org/keywords/convolutional-neural-network","display_name":"Convolutional neural network","score":0.5048711895942688},{"id":"https://openalex.org/keywords/neural-coding","display_name":"Neural coding","score":0.46626147627830505},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4528556168079376},{"id":"https://openalex.org/keywords/feature-extraction","display_name":"Feature extraction","score":0.4493808448314667},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4177650213241577},{"id":"https://openalex.org/keywords/inference","display_name":"Inference","score":0.4106886684894562},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3977780342102051},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.39050716161727905},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.21555402874946594},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.15379783511161804},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12911206483840942},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09687009453773499}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7118690609931946},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5832617878913879},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5633624792098999},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.5510224103927612},{"id":"https://openalex.org/C45347329","wikidata":"https://www.wikidata.org/wiki/Q5166604","display_name":"Convolution (computer science)","level":3,"score":0.5358959436416626},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.5104774236679077},{"id":"https://openalex.org/C81363708","wikidata":"https://www.wikidata.org/wiki/Q17084460","display_name":"Convolutional neural network","level":2,"score":0.5048711895942688},{"id":"https://openalex.org/C77637269","wikidata":"https://www.wikidata.org/wiki/Q7002051","display_name":"Neural coding","level":2,"score":0.46626147627830505},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4528556168079376},{"id":"https://openalex.org/C52622490","wikidata":"https://www.wikidata.org/wiki/Q1026626","display_name":"Feature extraction","level":2,"score":0.4493808448314667},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4177650213241577},{"id":"https://openalex.org/C2776214188","wikidata":"https://www.wikidata.org/wiki/Q408386","display_name":"Inference","level":2,"score":0.4106886684894562},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3977780342102051},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.39050716161727905},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.21555402874946594},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.15379783511161804},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12911206483840942},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09687009453773499},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2018.2865457","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2018.2865457","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G5741162098","display_name":null,"funder_award_id":"HR0011-13-2-0015","funder_id":"https://openalex.org/F4320332180","funder_display_name":"Defense Advanced Research Projects Agency"}],"funders":[{"id":"https://openalex.org/F4320307102","display_name":"Intel Corporation","ror":"https://ror.org/01ek73717"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":42,"referenced_works":["https://openalex.org/W1491802337","https://openalex.org/W1604973310","https://openalex.org/W1873441159","https://openalex.org/W1946953458","https://openalex.org/W1963995223","https://openalex.org/W1973794531","https://openalex.org/W1982456208","https://openalex.org/W2085400714","https://openalex.org/W2100543212","https://openalex.org/W2105892554","https://openalex.org/W2107214962","https://openalex.org/W2113606819","https://openalex.org/W2115276276","https://openalex.org/W2121058967","https://openalex.org/W2136994107","https://openalex.org/W2145889472","https://openalex.org/W2150066425","https://openalex.org/W2153663612","https://openalex.org/W2155377787","https://openalex.org/W2171490498","https://openalex.org/W2289252105","https://openalex.org/W2345244395","https://openalex.org/W2516141709","https://openalex.org/W2593564159","https://openalex.org/W2605487586","https://openalex.org/W2625457103","https://openalex.org/W2745153231","https://openalex.org/W2766143712","https://openalex.org/W2767644592","https://openalex.org/W2919115771","https://openalex.org/W2963909185","https://openalex.org/W4293652559","https://openalex.org/W4293867525","https://openalex.org/W6641258197","https://openalex.org/W6676885827","https://openalex.org/W6676903177","https://openalex.org/W6680444311","https://openalex.org/W6681934335","https://openalex.org/W6705115517","https://openalex.org/W6734592959","https://openalex.org/W6742662926","https://openalex.org/W6766005275"],"related_works":["https://openalex.org/W2116677773","https://openalex.org/W2155261584","https://openalex.org/W2584231425","https://openalex.org/W2042919702","https://openalex.org/W4386858688","https://openalex.org/W3034421924","https://openalex.org/W2982536526","https://openalex.org/W4380302312","https://openalex.org/W4390971171","https://openalex.org/W4385338604"],"abstract_inverted_index":{"A":[0,59],"configurable":[1],"neuroinspired":[2],"inference":[3,86],"accelerator":[4,20,87],"is":[5],"designed":[6],"as":[7],"an":[8,15,94],"array":[9],"of":[10],"neurons,":[11,90],"each":[12],"operating":[13],"in":[14,75,78,107],"independent":[16],"clock":[17],"domain.":[18],"The":[19,40,97],"implements":[21],"a":[22,26,91],"recurrent":[23],"network":[24],"using":[25],"novel":[27],"sparse":[28,34,42],"convolution":[29,43],"for":[30,37],"feedforward":[31],"operations":[32],"and":[33,47,56,68,93,104,112],"spike-driven":[35],"reconstruction":[36],"feedback":[38],"operations.":[39],"proposed":[41],"efficiently":[44],"skips":[45],"zero-patches,":[46],"can":[48],"be":[49],"made":[50],"to":[51,71],"support":[52],"practically":[53],"any":[54],"image":[55],"kernel":[57],"size.":[58],"globally":[60],"asynchronous":[61],"locally":[62],"synchronous":[63],"architecture":[64],"enables":[65],"scalable":[66],"design":[67],"load":[69],"balancing":[70],"achieve":[72],"22%":[73],"reduction":[74],"power.":[76],"Fabricated":[77],"40-nm":[79],"CMOS,":[80],"the":[81],"2.56-mm":[82],"<sup":[83],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[84],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[85],"integrates":[88],"48":[89],"hub,":[92],"OpenRISC":[95],"processor.":[96],"chip":[98],"achieves":[99],"718GOPS":[100],"at":[101],"380":[102],"MHz,":[103],"demonstrates":[105],"applications":[106],"feature":[108],"extraction":[109,114],"from":[110,115],"images":[111],"depth":[113],"stereo":[116],"images.":[117]},"counts_by_year":[{"year":2019,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
