{"id":"https://openalex.org/W2755826572","doi":"https://doi.org/10.1109/jssc.2017.2747151","title":"A 290-mV, 3.34-MHz, 6T SRAM With pMOS Access Transistors and Boosted Wordline in 65-nm CMOS Technology","display_name":"A 290-mV, 3.34-MHz, 6T SRAM With pMOS Access Transistors and Boosted Wordline in 65-nm CMOS Technology","publication_year":2017,"publication_date":"2017-09-18","ids":{"openalex":"https://openalex.org/W2755826572","doi":"https://doi.org/10.1109/jssc.2017.2747151","mag":"2755826572"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2017.2747151","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2017.2747151","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008315931","display_name":"Morteza Nabavi","orcid":"https://orcid.org/0000-0001-7960-471X"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Morteza Nabavi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON, Canada","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5086259491","display_name":"Manoj Sachdev","orcid":"https://orcid.org/0000-0002-8256-9828"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Manoj Sachdev","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON, Canada","institution_ids":["https://openalex.org/I151746483"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5008315931"],"corresponding_institution_ids":["https://openalex.org/I151746483"],"apc_list":null,"apc_paid":null,"fwci":1.7482,"has_fulltext":false,"cited_by_count":42,"citation_normalized_percentile":{"value":0.85889276,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":"53","issue":"2","first_page":"656","last_page":"667"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.9740597009658813},{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.8159624338150024},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.7850104570388794},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6648015379905701},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6450144052505493},{"id":"https://openalex.org/keywords/access-time","display_name":"Access time","score":0.5271230340003967},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4802848994731903},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.40943339467048645},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.33162522315979004},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3312433362007141},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3308103680610657},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.31104356050491333},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22752651572227478},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.14277738332748413}],"concepts":[{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.9740597009658813},{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.8159624338150024},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.7850104570388794},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6648015379905701},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6450144052505493},{"id":"https://openalex.org/C194080101","wikidata":"https://www.wikidata.org/wiki/Q46306","display_name":"Access time","level":2,"score":0.5271230340003967},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4802848994731903},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.40943339467048645},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.33162522315979004},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3312433362007141},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3308103680610657},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.31104356050491333},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22752651572227478},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.14277738332748413}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2017.2747151","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2017.2747151","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9100000262260437,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G4791635132","display_name":null,"funder_award_id":"NSERC-RGPIN-205034-2012 052714","funder_id":"https://openalex.org/F4320334593","funder_display_name":"Natural Sciences and Engineering Research Council of Canada"}],"funders":[{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W26080743","https://openalex.org/W1533614470","https://openalex.org/W1968464410","https://openalex.org/W1969775274","https://openalex.org/W1974982221","https://openalex.org/W2002612140","https://openalex.org/W2057899754","https://openalex.org/W2073818373","https://openalex.org/W2075778001","https://openalex.org/W2080441840","https://openalex.org/W2095913060","https://openalex.org/W2099760741","https://openalex.org/W2130398249","https://openalex.org/W2132010492","https://openalex.org/W2133256259","https://openalex.org/W2291764406","https://openalex.org/W2338090195","https://openalex.org/W3103339143"],"related_works":["https://openalex.org/W4386261925","https://openalex.org/W2082944690","https://openalex.org/W2263373136","https://openalex.org/W2023334077","https://openalex.org/W2005494397","https://openalex.org/W2339836056","https://openalex.org/W1811213809","https://openalex.org/W2730314563","https://openalex.org/W2058541779","https://openalex.org/W3192888672"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,40,82],"six-transistor":[4],"bitcell":[5],"SRAM":[6,84],"with":[7,75],"pMOS":[8,12,71],"access":[9,13,29,72],"transistor.":[10,77],"Utilizing":[11],"transistor":[14,30,73],"results":[15,94],"in":[16,87],"lower":[17,67],"zero-level":[18],"degradation":[19],"(ZLD)":[20],"and,":[21],"hence,":[22],"higher":[23],"read":[24],"stability.":[25],"In":[26,49],"addition,":[27],"the":[28,33,45,53,66,70,88,97,102],"connected":[31],"to":[32,51,64],"internal":[34],"node":[35],"holding":[36],"VDD":[37],"acts":[38],"as":[39,118],"stabilizer":[41],"and":[42],"counter":[43],"balances":[44],"effect":[46],"of":[47,69,101],"ZLD.":[48],"order":[50],"improve":[52],"writability,":[54],"wordline":[55],"(WL)":[56],"boosting":[57,61],"is":[58,85,105,116],"exploited.":[59],"WL":[60],"also":[62],"helps":[63],"compensate":[65],"speed":[68],"compared":[74],"nMOS":[76],"To":[78],"verify":[79],"our":[80],"design,":[81],"2-kb":[83],"fabricated":[86],"TSMC":[89],"65-nm":[90],"CMOS":[91],"technology.":[92],"Measurement":[93],"show":[95],"that":[96],"maximum":[98],"operational":[99],"frequency":[100],"test":[103],"chip":[104],"at":[106,109,121],"3.34":[107],"MHz":[108],"290":[110],"mV.":[111,123],"The":[112],"minimum":[113],"energy":[114],"consumption":[115],"measured":[117],"1.1":[119],"fJ/bit":[120],"400":[122]},"counts_by_year":[{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":11},{"year":2021,"cited_by_count":7},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":2}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}
