{"id":"https://openalex.org/W2741512718","doi":"https://doi.org/10.1109/jssc.2017.2717927","title":"Near- and Sub- $V_{t}$ Pipelines Based on Wide-Pulsed-Latch Design Techniques","display_name":"Near- and Sub- $V_{t}$ Pipelines Based on Wide-Pulsed-Latch Design Techniques","publication_year":2017,"publication_date":"2017-07-27","ids":{"openalex":"https://openalex.org/W2741512718","doi":"https://doi.org/10.1109/jssc.2017.2717927","mag":"2741512718"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2017.2717927","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2017.2717927","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100640242","display_name":"Wei Jin","orcid":"https://orcid.org/0000-0001-5108-5233"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]},{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["CN","US"],"is_corresponding":false,"raw_author_name":"Wei Jin","raw_affiliation_strings":["Columbia University, New York, NY, USA","School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0001-5108-5233","affiliations":[{"raw_affiliation_string":"Columbia University, New York, NY, USA","institution_ids":["https://openalex.org/I78577930"]},{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101677870","display_name":"Seongjong Kim","orcid":"https://orcid.org/0000-0002-8263-4597"},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Seongjong Kim","raw_affiliation_strings":["Columbia University, New York, NY, USA"],"raw_orcid":"https://orcid.org/0000-0002-8263-4597","affiliations":[{"raw_affiliation_string":"Columbia University, New York, NY, USA","institution_ids":["https://openalex.org/I78577930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101583945","display_name":"Weifeng He","orcid":"https://orcid.org/0000-0002-7753-644X"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weifeng He","raw_affiliation_strings":["School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103236320","display_name":"Zhigang Mao","orcid":"https://orcid.org/0000-0001-9431-9853"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhigang Mao","raw_affiliation_strings":["School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011887658","display_name":"Mingoo Seok","orcid":"https://orcid.org/0000-0002-9722-0979"},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mingoo Seok","raw_affiliation_strings":["Columbia University, New York, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Columbia University, New York, NY, USA","institution_ids":["https://openalex.org/I78577930"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4224,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.64374596,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"52","issue":"9","first_page":"2475","last_page":"2487"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/padding","display_name":"Padding","score":0.7438274621963501},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5631454586982727},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.5290243625640869},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5267921090126038},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5239729285240173},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.4739625155925751},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.46777716279029846},{"id":"https://openalex.org/keywords/pipeline-transport","display_name":"Pipeline transport","score":0.43816718459129333},{"id":"https://openalex.org/keywords/energy","display_name":"Energy (signal processing)","score":0.4351472854614258},{"id":"https://openalex.org/keywords/critical-path-method","display_name":"Critical path method","score":0.4310157895088196},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.32374370098114014},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.28354787826538086},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2528500556945801},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19778016209602356},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1528329849243164}],"concepts":[{"id":"https://openalex.org/C165435473","wikidata":"https://www.wikidata.org/wiki/Q1509884","display_name":"Padding","level":2,"score":0.7438274621963501},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5631454586982727},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.5290243625640869},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5267921090126038},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5239729285240173},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.4739625155925751},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.46777716279029846},{"id":"https://openalex.org/C175309249","wikidata":"https://www.wikidata.org/wiki/Q725864","display_name":"Pipeline transport","level":2,"score":0.43816718459129333},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.4351472854614258},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.4310157895088196},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.32374370098114014},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.28354787826538086},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2528500556945801},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19778016209602356},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1528329849243164},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C87717796","wikidata":"https://www.wikidata.org/wiki/Q146326","display_name":"Environmental engineering","level":1,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2017.2717927","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2017.2717927","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.9100000262260437}],"awards":[{"id":"https://openalex.org/G2057008086","display_name":null,"funder_award_id":"HR0011-13-C-0003","funder_id":"https://openalex.org/F4320337531","funder_display_name":"Defense Sciences Office, DARPA"},{"id":"https://openalex.org/G5415761988","display_name":"CAREER: Addressing Deepening Variability Challenges for Next-Generation Margin-Free VLSI Computing Platform Design","funder_award_id":"1453142","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G7691616827","display_name":null,"funder_award_id":"201406230166","funder_id":"https://openalex.org/F4320322725","funder_display_name":"China Scholarship Council"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320310822","display_name":"Catalyst Foundation","ror":"https://ror.org/012jwf593"},{"id":"https://openalex.org/F4320322725","display_name":"China Scholarship Council","ror":"https://ror.org/04atp4p48"},{"id":"https://openalex.org/F4320337531","display_name":"Defense Sciences Office, DARPA","ror":"https://ror.org/0447fe631"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":42,"referenced_works":["https://openalex.org/W1564962827","https://openalex.org/W1966733028","https://openalex.org/W1970872944","https://openalex.org/W1970984428","https://openalex.org/W1973359205","https://openalex.org/W1986965109","https://openalex.org/W2015406927","https://openalex.org/W2015917466","https://openalex.org/W2025847799","https://openalex.org/W2026531723","https://openalex.org/W2031390917","https://openalex.org/W2035902393","https://openalex.org/W2054166664","https://openalex.org/W2075814200","https://openalex.org/W2082597509","https://openalex.org/W2107103004","https://openalex.org/W2128247882","https://openalex.org/W2137616964","https://openalex.org/W2142398851","https://openalex.org/W2150564053","https://openalex.org/W2156464726","https://openalex.org/W2156667996","https://openalex.org/W2158055150","https://openalex.org/W2158407912","https://openalex.org/W2163728097","https://openalex.org/W2166222777","https://openalex.org/W2170331607","https://openalex.org/W2174721295","https://openalex.org/W2178304595","https://openalex.org/W2525832288","https://openalex.org/W2586657634","https://openalex.org/W2599468952","https://openalex.org/W3139757448","https://openalex.org/W3142269918","https://openalex.org/W3142628388","https://openalex.org/W3146247396","https://openalex.org/W3151246649","https://openalex.org/W4240810344","https://openalex.org/W6647121864","https://openalex.org/W6656891329","https://openalex.org/W6727988478","https://openalex.org/W6733449244"],"related_works":["https://openalex.org/W4380433113","https://openalex.org/W4386072068","https://openalex.org/W252339960","https://openalex.org/W2390529043","https://openalex.org/W2378320433","https://openalex.org/W2358343511","https://openalex.org/W2071821326","https://openalex.org/W2051877971","https://openalex.org/W1970117064","https://openalex.org/W2462270101"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,132,164],"methodology":[4],"and":[5,141,150,185,216],"chip":[6,169],"demonstration":[7],"to":[8,41,55,59,97,110,144],"design":[9,25],"near-/sub-threshold":[10],"voltage":[11],"(Vt)":[12],"pipelines":[13],"using":[14,63,73],"pulsed":[15],"latches":[16],"that":[17,117,172,201],"are":[18],"clocked":[19],"at":[20,189],"very":[21],"wide":[22],"pulses.":[23],"Pulsed-latch-based":[24],"is":[26,38,76],"known":[27],"for":[28],"time":[29,36,43,62],"borrowing":[30,37],"capability":[31],"but":[32],"the":[33,81,126,160,173,193,202,208],"amount":[34],"of":[35,128],"limited":[39],"due":[40,96],"hold":[42],"constraint.":[44],"To":[45],"enable":[46],"more":[47],"cycle":[48,61],"borrowing,":[49],"in":[50,78,102,163],"this":[51,139],"paper,":[52],"we":[53],"aim":[54],"pad":[56],"short":[57,93,134],"paths":[58],"~1/3":[60],"multi-V":[64],"<sub":[65,112,119],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[66,113,120],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">t</sub>":[67,114,121],"cell":[68],"library.":[69],"While":[70],"delay":[71,83,106],"padding":[72,95,136],"multi-Vt":[74,86],"cells":[75,87,122],"common":[77],"super-Vt":[79],"design,":[80],"small":[82],"difference":[84],"among":[85],"has":[88],"not":[89],"allowed":[90],"such":[91],"extensive":[92],"path":[94,135],"large":[98],"area":[99],"overhead.":[100],"However,":[101],"near-/sub-Vt":[103],"regime,":[104],"circuits":[105,149],"becomes":[107],"exponentially":[108],"sensitive":[109],"V":[111,191],",":[115],"suggesting":[116],"high-V":[118],"can":[123],"significantly":[124],"reduce":[125],"overhead":[127],"padding.":[129],"We":[130],"build":[131],"semi-automatic":[133],"flow":[137],"around":[138],"idea,":[140],"use":[142],"it":[143],"design:":[145],"1)":[146],"ISCAS":[147],"benchmark":[148],"2)":[151],"an":[152],"8-bit":[153],"8-tap":[154],"finite":[155],"impulse":[156],"response":[157],"(FIR)":[158],"core,":[159],"latter":[161],"fabricated":[162],"65-nm":[165],"CMOS":[166],"technology.":[167],"The":[168,196],"measurement":[170,197],"shows":[171],"proposed":[174,203],"FIR":[175,204],"core":[176,205],"achieves":[177],"45.2%":[178],"throughput":[179],"(frequency),":[180],"11%":[181],"energy":[182],"efficiency":[183],"(Energy/cycle),":[184],"38%":[186],"energy-delay-product":[187],"improvements":[188],"0.35":[190],"over":[192],"flip-flop-pipelined":[194],"baseline.":[195],"results":[198],"also":[199],"confirm":[200],"operates":[206],"with":[207],"same":[209],"pulsewidth":[210],"setting":[211],"robustly":[212],"across":[213],"process,":[214],"voltage,":[215],"temperature":[217],"variations.":[218]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
