{"id":"https://openalex.org/W2605535526","doi":"https://doi.org/10.1109/jssc.2017.2690872","title":"On-Chip Two-Tone Synthesizer Based on a Mixing-FIR Architecture","display_name":"On-Chip Two-Tone Synthesizer Based on a Mixing-FIR Architecture","publication_year":2017,"publication_date":"2017-04-17","ids":{"openalex":"https://openalex.org/W2605535526","doi":"https://doi.org/10.1109/jssc.2017.2690872","mag":"2605535526"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2017.2690872","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2017.2690872","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004256925","display_name":"Congyin Shi","orcid":"https://orcid.org/0000-0002-4527-0317"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Congyin Shi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Texas A&M University, College Station, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Texas A&M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5019857998","display_name":"E. S\u00e1nchez\u2010Sinencio","orcid":"https://orcid.org/0000-0003-2116-1842"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Edgar Sanchez-Sinencio","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Texas A&M University, College Station, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Texas A&M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5004256925"],"corresponding_institution_ids":["https://openalex.org/I91045830"],"apc_list":null,"apc_paid":null,"fwci":1.402,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.79582397,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"52","issue":"8","first_page":"2105","last_page":"2116"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.6371853351593018},{"id":"https://openalex.org/keywords/harmonics","display_name":"Harmonics","score":0.532146155834198},{"id":"https://openalex.org/keywords/dbc","display_name":"dBc","score":0.47363772988319397},{"id":"https://openalex.org/keywords/frequency-multiplier","display_name":"Frequency multiplier","score":0.4667437672615051},{"id":"https://openalex.org/keywords/direct-digital-synthesizer","display_name":"Direct digital synthesizer","score":0.4635073244571686},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4371856153011322},{"id":"https://openalex.org/keywords/intermodulation","display_name":"Intermodulation","score":0.41330763697624207},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.40047043561935425},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.3842228353023529},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.37727558612823486},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3301617205142975},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.31648004055023193},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.3001038134098053},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.29736894369125366},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2823134660720825},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.16584721207618713}],"concepts":[{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.6371853351593018},{"id":"https://openalex.org/C188414643","wikidata":"https://www.wikidata.org/wiki/Q3001183","display_name":"Harmonics","level":3,"score":0.532146155834198},{"id":"https://openalex.org/C193523891","wikidata":"https://www.wikidata.org/wiki/Q1771950","display_name":"dBc","level":3,"score":0.47363772988319397},{"id":"https://openalex.org/C146002875","wikidata":"https://www.wikidata.org/wiki/Q1074289","display_name":"Frequency multiplier","level":3,"score":0.4667437672615051},{"id":"https://openalex.org/C166089067","wikidata":"https://www.wikidata.org/wiki/Q1227465","display_name":"Direct digital synthesizer","level":5,"score":0.4635073244571686},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4371856153011322},{"id":"https://openalex.org/C11773624","wikidata":"https://www.wikidata.org/wiki/Q2142232","display_name":"Intermodulation","level":4,"score":0.41330763697624207},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.40047043561935425},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.3842228353023529},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.37727558612823486},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3301617205142975},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.31648004055023193},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.3001038134098053},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.29736894369125366},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2823134660720825},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.16584721207618713}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2017.2690872","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2017.2690872","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.47999998927116394,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320308258","display_name":"Qualcomm","ror":"https://ror.org/002zrf773"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1548526397","https://openalex.org/W1557622819","https://openalex.org/W1985594279","https://openalex.org/W1991729524","https://openalex.org/W2014886970","https://openalex.org/W2040640857","https://openalex.org/W2048697158","https://openalex.org/W2078935974","https://openalex.org/W2079846651","https://openalex.org/W2080937172","https://openalex.org/W2092704120","https://openalex.org/W2098123269","https://openalex.org/W2099432139","https://openalex.org/W2117843175","https://openalex.org/W2124710715","https://openalex.org/W2127490982","https://openalex.org/W2140823559","https://openalex.org/W2147084331","https://openalex.org/W2156179687","https://openalex.org/W2161840222","https://openalex.org/W2163776889","https://openalex.org/W2165580659","https://openalex.org/W2400300013","https://openalex.org/W2542101531"],"related_works":["https://openalex.org/W2371029054","https://openalex.org/W2370071821","https://openalex.org/W2093119242","https://openalex.org/W2769992427","https://openalex.org/W2394106628","https://openalex.org/W2350996794","https://openalex.org/W2088877925","https://openalex.org/W2384857702","https://openalex.org/W2367423162","https://openalex.org/W2178871507"],"abstract_inverted_index":{"A":[0],"low-distortion":[1],"current-steering":[2],"two-tone":[3,85,130,180,197],"sinusoidal":[4,86],"signal":[5,69],"synthesizer":[6,20,90,131],"based":[7],"on":[8],"a":[9,27,36,54,92,114,118,122,137,150],"mixing-finite":[10],"impulse":[11],"response":[12],"(FIR)":[13],"architecture":[14],"is":[15,70,102,142,199],"proposed.":[16],"The":[17,67,88,108,193],"proposed":[18,89],"robust":[19],"adopts":[21],"only":[22],"digital":[23],"blocks.":[24],"It":[25,141],"implements":[26],"two-stage":[28],"cascade":[29],"FIR":[30,98],"harmonic":[31],"cancellation":[32],"technique":[33],"that":[34],"generates":[35],"single":[37],"tone":[38],"quasi-sinusoidal":[39],"waveform":[40],"and":[41,53,121,178],"suppress":[42],"the":[43,48,64,74,83,97,173,179,196,204],"odd-order":[44],"harmonics":[45],"up":[46],"to":[47,62,73,135,210],"21st":[49],"order.":[50],"Differential-mode":[51],"circuitry":[52],"50%":[55],"duty":[56],"cycle":[57],"clock":[58,116],"are":[59],"also":[60],"utilized":[61],"cancel":[63],"even-order":[65],"harmonics.":[66],"single-tone":[68],"further":[71],"up-converted":[72],"desired":[75,84],"local":[76],"oscillator":[77],"(LO)":[78],"frequency":[79,169,175,206],"band,":[80],"thereby":[81],"producing":[82],"signals.":[87],"contains":[91],"current":[93,119],"mirror":[94],"array":[95],"implementing":[96],"tap":[99],"coefficients.":[100],"Accuracy":[101],"enhanced":[103],"using":[104],"dynamic":[105],"element":[106],"matching.":[107],"other":[109],"building":[110],"blocks":[111],"consist":[112],"of":[113],"24-phase":[115],"generator,":[117],"combiner,":[120],"passive":[123],"mixer":[124],"with":[125],"bootstrapped":[126],"MOS":[127],"switches.":[128],"This":[129],"can":[132,190],"be":[133,191],"used":[134],"conduct":[136],"linearity":[138],"built-in":[139],"self-test.":[140],"fabricated":[143],"in":[144],"130-nm":[145],"standard":[146],"CMOS":[147],"technology,":[148],"occupying":[149],"0.056-mm":[151],"<sup":[152],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[153],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[154],"silicon":[155],"area.":[156],"Measurement":[157],"shows":[158],"better":[159,186],"than":[160,187],"-68":[161],"dBc":[162,189],"third-order":[163],"intermodulation":[164],"(IM3)":[165],"below":[166],"480-MHz":[167],"LO":[168,174],"without":[170],"calibration.":[171],"For":[172],"<;76.8":[176],"MHz":[177],"difference":[181],"<;2":[182],"MHz,":[183],"an":[184],"IM3":[185],"-75":[188],"achieved.":[192],"imbalance":[194],"between":[195],"amplitudes":[198],"measured":[200],"<;0.1":[201],"dB":[202],"across":[203],"whole":[205],"range":[207],"from":[208],"dc":[209],"1":[211],"GHz.":[212]},"counts_by_year":[{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":6},{"year":2018,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}