{"id":"https://openalex.org/W2401371495","doi":"https://doi.org/10.1109/jssc.2016.2558490","title":"<inline-formula> <tex-math notation=\"LaTeX\">$\\mu $ </tex-math> </inline-formula>RNG: A 300\u2013950 mV, 323 Gbps/W All-Digital Full-Entropy True Random Number Generator in 14 nm FinFET CMOS","display_name":"<inline-formula> <tex-math notation=\"LaTeX\">$\\mu $ </tex-math> </inline-formula>RNG: A 300\u2013950 mV, 323 Gbps/W All-Digital Full-Entropy True Random Number Generator in 14 nm FinFET CMOS","publication_year":2016,"publication_date":"2016-05-27","ids":{"openalex":"https://openalex.org/W2401371495","doi":"https://doi.org/10.1109/jssc.2016.2558490","mag":"2401371495"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2016.2558490","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2016.2558490","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039276616","display_name":"Sanu Mathew","orcid":"https://orcid.org/0000-0003-1344-7533"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sanu K. Mathew","raw_affiliation_strings":["Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044068291","display_name":"D. J. Johnston","orcid":"https://orcid.org/0000-0002-4340-6129"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Johnston","raw_affiliation_strings":["IP Blocks & Technology Group, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IP Blocks & Technology Group, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075692568","display_name":"Sudhir Satpathy","orcid":"https://orcid.org/0000-0003-3511-3526"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sudhir Satpathy","raw_affiliation_strings":["Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078003656","display_name":"Vikram Suresh","orcid":"https://orcid.org/0000-0001-8879-1967"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vikram Suresh","raw_affiliation_strings":["Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076549226","display_name":"P. Newman","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Paul Newman","raw_affiliation_strings":["Device Development Group, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Device Development Group, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052106795","display_name":"Mark Anders","orcid":"https://orcid.org/0000-0001-5748-8420"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark A. Anders","raw_affiliation_strings":["Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081032347","display_name":"Himanshu Kaul","orcid":"https://orcid.org/0000-0003-1586-7486"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Himanshu Kaul","raw_affiliation_strings":["Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006348328","display_name":"Amit Agarwal","orcid":"https://orcid.org/0000-0002-4220-3346"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Amit Agarwal","raw_affiliation_strings":["Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109275074","display_name":"Steven K. Hsu","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Steven K. Hsu","raw_affiliation_strings":["Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090166397","display_name":"Gregory Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Gregory Chen","raw_affiliation_strings":["Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074107306","display_name":"Ram Krishnamurthy","orcid":"https://orcid.org/0000-0002-2428-7099"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ram K. Krishnamurthy","raw_affiliation_strings":["Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":9.9208,"has_fulltext":false,"cited_by_count":102,"citation_normalized_percentile":{"value":0.98066539,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":"51","issue":"7","first_page":"1695","last_page":"1704"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/entropy","display_name":"Entropy (arrow of time)","score":0.5737026333808899},{"id":"https://openalex.org/keywords/random-number-generation","display_name":"Random number generation","score":0.5447431802749634},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4385635256767273},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.41874730587005615},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3725849986076355},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.32687485218048096},{"id":"https://openalex.org/keywords/quantum-mechanics","display_name":"Quantum mechanics","score":0.12283638119697571}],"concepts":[{"id":"https://openalex.org/C106301342","wikidata":"https://www.wikidata.org/wiki/Q4117933","display_name":"Entropy (arrow of time)","level":2,"score":0.5737026333808899},{"id":"https://openalex.org/C201866948","wikidata":"https://www.wikidata.org/wiki/Q228206","display_name":"Random number generation","level":2,"score":0.5447431802749634},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4385635256767273},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41874730587005615},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3725849986076355},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.32687485218048096},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.12283638119697571}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2016.2558490","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2016.2558490","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.9100000262260437,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1511514754","https://openalex.org/W1517403092","https://openalex.org/W1588877666","https://openalex.org/W1966797259","https://openalex.org/W1980688410","https://openalex.org/W2004694319","https://openalex.org/W2010205010","https://openalex.org/W2031590600","https://openalex.org/W2033711887","https://openalex.org/W2074361018","https://openalex.org/W2092798673","https://openalex.org/W2095609723","https://openalex.org/W2111877940","https://openalex.org/W2113158626","https://openalex.org/W2113322447","https://openalex.org/W2117205818","https://openalex.org/W2132979456","https://openalex.org/W2139280266","https://openalex.org/W2150778842","https://openalex.org/W2154519861","https://openalex.org/W2160990975","https://openalex.org/W2784781042","https://openalex.org/W3140517496","https://openalex.org/W4230965853","https://openalex.org/W6635070356","https://openalex.org/W6674725526","https://openalex.org/W6682151157"],"related_works":["https://openalex.org/W2935759653","https://openalex.org/W3105167352","https://openalex.org/W54078636","https://openalex.org/W2954470139","https://openalex.org/W1501425562","https://openalex.org/W2902782467","https://openalex.org/W3084825885","https://openalex.org/W2298861036","https://openalex.org/W3148032049","https://openalex.org/W2131123012"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"\u03bcRNG,":[3],"an":[4,43,50,70],"ultra-lightweight":[5],"all-digital":[6,58],"full-entropy":[7,97,205],"true-random":[8],"number":[9],"generator":[10],"(TRNG),":[11],"fabricated":[12],"in":[13,26,219],"14":[14],"nm":[15],"high-k/metal-gate":[16],"FinFET":[17],"CMOS,":[18],"targeted":[19],"for":[20,140],"on-die":[21],"generation":[22],"of":[23,37,81,107,114,150,165,182,195,201,207,213],"cryptographic":[24],"keys":[25],"energy-constrained":[27],"IoT":[28],"and":[29,69,110,177,222],"wearable":[30],"platforms.":[31],"The":[32],"\u03bcRNG":[33],"combines":[34],"the":[35,128],"entropy":[36,53,59,130,231],"multiple":[38],"independent":[39,56],"sources":[40,131],"to":[41,171,228],"generate":[42],"output":[44,139],"bitstream":[45],"that":[46],"is":[47],"indistinguishable":[48],"from":[49,127],"ideal":[51],"unbiased":[52],"source.":[54],"Three":[55],"self-calibrating":[57],"sources,":[60],"coupled":[61],"with":[62,85,103,132,143,168,204],"XOR":[63],"feedback":[64],"shift-register":[65],"based":[66],"correlation":[67],"suppressors":[68],"in-line":[71],"compact":[72],"Barak-Impagliazzo-":[73],"Wigderson":[74],"(BIW)":[75],"extractor":[76],"enable":[77],"ultra-low":[78],"energy":[79,225],"consumption":[80,106,212,226],"3":[82],"pJ/full-entropy":[83],"bit":[84],"a":[86,151],"dense":[87],"layout":[88],"occupying":[89],"1008":[90],"\u03bcm2,":[91],"while":[92],"achieving:":[93],"(i)":[94],"162.5":[95],"Mbps":[96,173],"throughput":[98,169,206],"at":[99,118,174,188,198],"1.3":[100],"GHz":[101],"operation,":[102],"total":[104,210],"power":[105,112,211],"1.5":[108],"mW":[109],"leakage":[111],"component":[113],"90":[115],"\u03bcW,":[116,186,215],"measured":[117,187],"0.75":[119],"V,":[120],"25\u00b0C,":[121,191],"(ii)":[122],"mutually":[123],"uncorrelated":[124],"raw":[125],"bitstreams":[126],"three":[129],"phi-coefficient":[133],"cross-correlation\u221e>":[134],"0.99,":[135],"(iv)":[136],"hysteresis-free":[137],"extracted":[138],"lags":[141],"1-1000,":[142],"ACF":[144],"~0":[145],"within":[146],"95%":[147],"confidence":[148],"bounds":[149],"Gaussian":[152],"distribution":[153],"(\u03bc":[154],"=":[155],"0,":[156],"\u03c32=":[157],"0.002),":[158],"(v)":[159],"wide":[160],"operating":[161],"supply":[162],"voltage":[163,180,200],"range":[164],"300-950":[166],"mV":[167,176],"scaling":[170],"225":[172],"950":[175],"robust":[178],"subthreshold":[179],"performance":[181],"400":[183,202],"Kbps,":[184],"4":[185],"300":[189],"mV,":[190,203],"(vi)":[192],"peak":[193],"energy-efficiency":[194],"323":[196],"Gbps/W":[197],"near-threshold":[199],"8.6":[208],"Mbps,":[209],"27":[214],"(vii)":[216],"6.5\u00d7":[217],"reduction":[218],"gate":[220],"count":[221],"5.4\u00d7":[223],"lower":[224],"compared":[227],"conventional":[229],"AES-based":[230],"extractors.":[232]},"counts_by_year":[{"year":2026,"cited_by_count":5},{"year":2025,"cited_by_count":10},{"year":2024,"cited_by_count":12},{"year":2023,"cited_by_count":9},{"year":2022,"cited_by_count":15},{"year":2021,"cited_by_count":14},{"year":2020,"cited_by_count":14},{"year":2019,"cited_by_count":13},{"year":2018,"cited_by_count":7},{"year":2017,"cited_by_count":3}],"updated_date":"2026-08-12T21:12:35.861297","created_date":"2025-10-10T00:00:00"}