{"id":"https://openalex.org/W2331783522","doi":"https://doi.org/10.1109/jssc.2016.2515510","title":"A 28 nm Configurable Memory (TCAM/BCAM/SRAM) Using Push-Rule 6T Bit Cell Enabling Logic-in-Memory","display_name":"A 28 nm Configurable Memory (TCAM/BCAM/SRAM) Using Push-Rule 6T Bit Cell Enabling Logic-in-Memory","publication_year":2016,"publication_date":"2016-02-08","ids":{"openalex":"https://openalex.org/W2331783522","doi":"https://doi.org/10.1109/jssc.2016.2515510","mag":"2331783522"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2016.2515510","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2016.2515510","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035733630","display_name":"Supreet Jeloka","orcid":"https://orcid.org/0000-0002-8477-4745"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Supreet Jeloka","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027936522","display_name":"Naveen Bharathwaj Akesh","orcid":null},"institutions":[{"id":"https://openalex.org/I1342911587","display_name":"Oracle (United States)","ror":"https://ror.org/006c77m33","country_code":"US","type":"company","lineage":["https://openalex.org/I1342911587"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Naveen Bharathwaj Akesh","raw_affiliation_strings":["Oracle, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Oracle, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1342911587"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000767141","display_name":"Dennis Sylvester","orcid":"https://orcid.org/0000-0003-2598-0458"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dennis Sylvester","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026311377","display_name":"David Blaauw","orcid":"https://orcid.org/0000-0001-6744-7075"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Blaauw","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5035733630"],"corresponding_institution_ids":["https://openalex.org/I27837315"],"apc_list":null,"apc_paid":null,"fwci":20.934,"has_fulltext":false,"cited_by_count":333,"citation_normalized_percentile":{"value":0.9975218,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":100},"biblio":{"volume":"51","issue":"4","first_page":"1009","last_page":"1021"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7877925634384155},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6583947539329529},{"id":"https://openalex.org/keywords/content-addressable-memory","display_name":"Content-addressable memory","score":0.6094056367874146},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.5719900131225586},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.5631609559059143},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.48532336950302124},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4489639103412628},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.42424240708351135},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4137979745864868},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3838605284690857},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36929309368133545},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.2874991297721863},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.09820348024368286},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.08809521794319153},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.08611395955085754}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7877925634384155},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6583947539329529},{"id":"https://openalex.org/C53442348","wikidata":"https://www.wikidata.org/wiki/Q745101","display_name":"Content-addressable memory","level":3,"score":0.6094056367874146},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.5719900131225586},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.5631609559059143},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.48532336950302124},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4489639103412628},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.42424240708351135},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4137979745864868},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3838605284690857},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36929309368133545},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.2874991297721863},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.09820348024368286},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.08809521794319153},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.08611395955085754}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2016.2515510","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2016.2515510","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320328444","display_name":"Basque Center for Applied Mathematics","ror":"https://ror.org/03b21sh32"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":33,"referenced_works":["https://openalex.org/W1545405835","https://openalex.org/W1964999964","https://openalex.org/W1968310982","https://openalex.org/W1986214719","https://openalex.org/W1996424708","https://openalex.org/W2006317948","https://openalex.org/W2013435193","https://openalex.org/W2036642572","https://openalex.org/W2062143991","https://openalex.org/W2064254772","https://openalex.org/W2087345965","https://openalex.org/W2101739742","https://openalex.org/W2103664004","https://openalex.org/W2110850401","https://openalex.org/W2112980698","https://openalex.org/W2130048397","https://openalex.org/W2130195589","https://openalex.org/W2134658627","https://openalex.org/W2136308753","https://openalex.org/W2147570207","https://openalex.org/W2148256155","https://openalex.org/W2152484003","https://openalex.org/W2158715350","https://openalex.org/W2166284215","https://openalex.org/W2167843126","https://openalex.org/W3146874818","https://openalex.org/W4232446824","https://openalex.org/W4241909950","https://openalex.org/W6632728827","https://openalex.org/W6642391461","https://openalex.org/W6649595165","https://openalex.org/W6672536603","https://openalex.org/W6683085269"],"related_works":["https://openalex.org/W2068933159","https://openalex.org/W2189053673","https://openalex.org/W3200702775","https://openalex.org/W4319596555","https://openalex.org/W2561005478","https://openalex.org/W2079019992","https://openalex.org/W2738228043","https://openalex.org/W2199439667","https://openalex.org/W2546565930","https://openalex.org/W3048967625"],"abstract_inverted_index":{"Conventional":[0],"content":[1],"addressable":[2],"memory":[3,71,92],"(BCAM":[4],"and":[5,39,53,78,95,113,135],"TCAM)":[6],"uses":[7],"specialized":[8],"10T/16T":[9],"bit":[10,122,145],"cells":[11],"that":[12,25],"are":[13],"significantly":[14],"larger":[15],"than":[16],"6T":[17,31,117],"SRAM":[18,32,44,121],"cells.":[19],"A":[20,139],"new":[21],"BCAM/TCAM":[22],"is":[23],"proposed":[24],"can":[26,56,72,99],"operate":[27],"with":[28,93],"standard":[29],"push-rule":[30],"cells,":[33],"reducing":[34],"array":[35],"area":[36,52],"by":[37],"2-5\u00d7":[38],"allowing":[40],"reconfiguration":[41],"of":[42],"the":[43,69,87,90,108,124],"as":[45],"a":[46,116],"CAM.":[47],"In":[48,67],"this":[49],"way,":[50],"chip":[51],"overall":[54],"capacitance":[55],"be":[57,100],"reduced,":[58],"leading":[59],"to":[60,102,107],"higher":[61],"energy":[62],"efficiency":[63],"for":[64],"search":[65],"operations.":[66],"addition,":[68],"configurable":[70,91],"perform":[73],"bit-wise":[74],"logical":[75,96,140],"operations:":[76],"\u201cAND\u201d":[77],"\u201cNOR\u201d":[79],"on":[80],"two":[81,143],"or":[82],"more":[83],"words":[84,146],"stored":[85],"within":[86],"array.":[88],"Thus,":[89],"CAM":[94],"function":[97],"capability":[98],"used":[101],"off-load":[103],"specific":[104],"computational":[105],"operations":[106],"memory,":[109],"improving":[110],"system":[111],"performance":[112],"efficiency.":[114],"Using":[115],"28":[118],"nm":[119],"FDSOI":[120],"cell,":[123],"64\u00d764":[125],"(4":[126],"kb)":[127],"BCAM":[128],"achieves":[129,147],"370":[130],"MHz":[131,149],"at":[132,150],"1":[133,151],"V":[134],"consumes":[136],"0.6":[137],"fJ/search/bit.":[138],"operation":[141],"between":[142],"64":[144],"787":[148],"V.":[152]},"counts_by_year":[{"year":2026,"cited_by_count":6},{"year":2025,"cited_by_count":49},{"year":2024,"cited_by_count":49},{"year":2023,"cited_by_count":51},{"year":2022,"cited_by_count":35},{"year":2021,"cited_by_count":42},{"year":2020,"cited_by_count":35},{"year":2019,"cited_by_count":34},{"year":2018,"cited_by_count":15},{"year":2017,"cited_by_count":15},{"year":2016,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}
