{"id":"https://openalex.org/W2127739484","doi":"https://doi.org/10.1109/jssc.2015.2402222","title":"Clock and Synchronization Networks for a 3 GHz 64 Bit ARMv8 8-Core SoC","display_name":"Clock and Synchronization Networks for a 3 GHz 64 Bit ARMv8 8-Core SoC","publication_year":2015,"publication_date":"2015-03-03","ids":{"openalex":"https://openalex.org/W2127739484","doi":"https://doi.org/10.1109/jssc.2015.2402222","mag":"2127739484"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2015.2402222","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2015.2402222","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028192239","display_name":"L. Ravezzi","orcid":"https://orcid.org/0000-0003-2427-6311"},"institutions":[{"id":"https://openalex.org/I76766440","display_name":"University of San Francisco","ror":"https://ror.org/029m7xn54","country_code":"US","type":"education","lineage":["https://openalex.org/I76766440"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Luca Ravezzi","raw_affiliation_strings":["Applied Micro, Sunnyvale, USA","San Francisco,"],"affiliations":[{"raw_affiliation_string":"Applied Micro, Sunnyvale, USA","institution_ids":[]},{"raw_affiliation_string":"San Francisco,","institution_ids":["https://openalex.org/I76766440"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068048125","display_name":"H. Partovi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156784","display_name":"Alto Neuroscience (United States)","ror":"https://ror.org/04w74e817","country_code":"US","type":"company","lineage":["https://openalex.org/I4210156784"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hamid Partovi","raw_affiliation_strings":["Applied Micro, Sunnyvale, USA","Los Altos,"],"affiliations":[{"raw_affiliation_string":"Applied Micro, Sunnyvale, USA","institution_ids":[]},{"raw_affiliation_string":"Los Altos,","institution_ids":["https://openalex.org/I4210156784"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5028192239"],"corresponding_institution_ids":["https://openalex.org/I76766440"],"apc_list":null,"apc_paid":null,"fwci":0.9864,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.79357163,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"50","issue":"7","first_page":"1702","last_page":"1710"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8337234258651733},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.6541274189949036},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5782877206802368},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.5262842774391174},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5051072239875793},{"id":"https://openalex.org/keywords/cpu-multiplier","display_name":"CPU multiplier","score":0.49398308992385864},{"id":"https://openalex.org/keywords/duty-cycle","display_name":"Duty cycle","score":0.48769840598106384},{"id":"https://openalex.org/keywords/clock-domain-crossing","display_name":"Clock domain crossing","score":0.48438435792922974},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47171255946159363},{"id":"https://openalex.org/keywords/digital-clock-manager","display_name":"Digital clock manager","score":0.4672040343284607},{"id":"https://openalex.org/keywords/clock-synchronization","display_name":"Clock synchronization","score":0.45369863510131836},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.41336801648139954},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4117244780063629},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.3562493920326233},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33479630947113037},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.2520507574081421},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2512815296649933},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.22396346926689148},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1946215033531189},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.091189444065094}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8337234258651733},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.6541274189949036},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5782877206802368},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.5262842774391174},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5051072239875793},{"id":"https://openalex.org/C125576049","wikidata":"https://www.wikidata.org/wiki/Q2246273","display_name":"CPU multiplier","level":5,"score":0.49398308992385864},{"id":"https://openalex.org/C199822604","wikidata":"https://www.wikidata.org/wiki/Q557120","display_name":"Duty cycle","level":3,"score":0.48769840598106384},{"id":"https://openalex.org/C127204226","wikidata":"https://www.wikidata.org/wiki/Q5134799","display_name":"Clock domain crossing","level":5,"score":0.48438435792922974},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47171255946159363},{"id":"https://openalex.org/C113074038","wikidata":"https://www.wikidata.org/wiki/Q5276052","display_name":"Digital clock manager","level":5,"score":0.4672040343284607},{"id":"https://openalex.org/C129891060","wikidata":"https://www.wikidata.org/wiki/Q1513059","display_name":"Clock synchronization","level":4,"score":0.45369863510131836},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.41336801648139954},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4117244780063629},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.3562493920326233},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33479630947113037},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.2520507574081421},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2512815296649933},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.22396346926689148},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1946215033531189},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.091189444065094},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2015.2402222","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2015.2402222","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7900000214576721,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W2028625707","https://openalex.org/W2044141477","https://openalex.org/W2051192488","https://openalex.org/W2072448041","https://openalex.org/W2085344061","https://openalex.org/W2100144876","https://openalex.org/W2103561789","https://openalex.org/W2111944961","https://openalex.org/W2132463291","https://openalex.org/W2136810784","https://openalex.org/W2155294410","https://openalex.org/W2157763958","https://openalex.org/W2158486845","https://openalex.org/W2171122001","https://openalex.org/W6683221888"],"related_works":["https://openalex.org/W3006003651","https://openalex.org/W2052455055","https://openalex.org/W2040807843","https://openalex.org/W4386968318","https://openalex.org/W2161776375","https://openalex.org/W2088914741","https://openalex.org/W4247180033","https://openalex.org/W2133326759","https://openalex.org/W2559451387","https://openalex.org/W4249038728"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"the":[3,24,63,105,114,136,141],"clock":[4,64,106,129],"distribution":[5,65],"and":[6,34,49,69,76,83,89,109,166],"synchronization":[7,173],"network":[8],"for":[9,20,54,126,170],"a":[10,18,29,43,60],"64":[11],"bit":[12],"ARMv8":[13],"8-core":[14],"microprocessor.":[15],"Embedded":[16],"in":[17,28,99],"SoC":[19],"cloud":[21],"computing":[22],"platforms,":[23],"processor":[25,115],"is":[26,168,175],"fabricated":[27],"40":[30],"nm":[31],"CMOS":[32,70],"technology":[33],"operates":[35],"at":[36],"3.0":[37],"GHz.":[38],"The":[39],"system":[40],"PLL":[41],"has":[42],"measured":[44],"rms":[45,82],"jitter":[46,75,88],"<;1":[47],"ps":[48,85],"features":[50],"dynamic":[51],"frequency":[52,138],"hopping":[53],"DVFS":[55],"applications.":[56],"In":[57],"conjunction":[58],"with":[59],"Star/H/Mesh":[61],"topology,":[62],"uses":[66],"both":[67],"CML":[68],"circuits":[71,98],"to":[72,102,134,144,161],"minimize":[73],"period":[74,87],"nominally":[77],"achieves":[78],"<;0.8":[79],"ps/mV":[80],"|":[81],"<;9":[84],"of":[86,140,164],"skew,":[90],"respectively.":[91],"By":[92],"using":[93],"local":[94],"Duty":[95],"Cycle":[96],"Adjustment":[97],"each":[100],"core":[101],"properly":[103],"offset":[104],"duty":[107],"cycle":[108],"ease":[110],"timing":[111,147],"critical":[112],"paths,":[113],"performance":[116],"improves":[117,157],"by":[118,159],"more":[119],"than":[120],"5%.":[121],"A":[122],"simple":[123],"probing":[124],"circuit":[125],"high":[127,137,171],"speed":[128,172],"measurements":[130],"can":[131],"be":[132],"used":[133],"monitor":[135],"excursions":[139],"internal":[142],"supply":[143],"counteract":[145],"any":[146],"violation":[148],"that":[149],"could":[150],"occur.":[151],"Finally":[152],"an":[153],"enhanced":[154],"latch,":[155],"which":[156],"MTBF":[158],"up":[160],"5":[162],"orders":[163],"magnitude":[165],"thus":[167],"suited":[169],"operations,":[174],"proposed.":[176]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
