{"id":"https://openalex.org/W2114972738","doi":"https://doi.org/10.1109/jssc.2014.2384039","title":"340 mV\u20131.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With Area-Optimized Encrypt/Decrypt GF(2 4 ) 2 Polynomials in 22 nm Tri-Gate CMOS","display_name":"340 mV\u20131.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With Area-Optimized Encrypt/Decrypt GF(2 4 ) 2 Polynomials in 22 nm Tri-Gate CMOS","publication_year":2015,"publication_date":"2015-01-23","ids":{"openalex":"https://openalex.org/W2114972738","doi":"https://doi.org/10.1109/jssc.2014.2384039","mag":"2114972738"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2014.2384039","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2014.2384039","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039276616","display_name":"Sanu Mathew","orcid":"https://orcid.org/0000-0003-1344-7533"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sanu Mathew","raw_affiliation_strings":["Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075692568","display_name":"Sudhir Satpathy","orcid":"https://orcid.org/0000-0003-3511-3526"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sudhir Satpathy","raw_affiliation_strings":["Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078003656","display_name":"Vikram Suresh","orcid":"https://orcid.org/0000-0001-8879-1967"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vikram Suresh","raw_affiliation_strings":["Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052106795","display_name":"Mark Anders","orcid":"https://orcid.org/0000-0001-5748-8420"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark Anders","raw_affiliation_strings":["Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081032347","display_name":"Himanshu Kaul","orcid":"https://orcid.org/0000-0003-1586-7486"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Himanshu Kaul","raw_affiliation_strings":["Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006348328","display_name":"Amit Agarwal","orcid":"https://orcid.org/0000-0002-4220-3346"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Amit Agarwal","raw_affiliation_strings":["Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109340111","display_name":"Steven Hsu","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Steven Hsu","raw_affiliation_strings":["Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090166397","display_name":"Gregory Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Gregory Chen","raw_affiliation_strings":["Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074107306","display_name":"Ram Krishnamurthy","orcid":"https://orcid.org/0000-0002-2428-7099"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ram Krishnamurthy","raw_affiliation_strings":["Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Circuit Research Lab, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":9,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":28.0459,"has_fulltext":false,"cited_by_count":139,"citation_normalized_percentile":{"value":0.99628553,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":"50","issue":"4","first_page":"1048","last_page":"1058"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.8198255300521851},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5844696760177612},{"id":"https://openalex.org/keywords/advanced-encryption-standard","display_name":"Advanced Encryption Standard","score":0.4964635968208313},{"id":"https://openalex.org/keywords/byte","display_name":"Byte","score":0.470562219619751},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4438515901565552},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4317156672477722},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.4255019426345825},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.41596004366874695},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.34072935581207275},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.32124805450439453},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.17544850707054138},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.1716690957546234},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13451501727104187},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09282901883125305}],"concepts":[{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.8198255300521851},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5844696760177612},{"id":"https://openalex.org/C94520183","wikidata":"https://www.wikidata.org/wiki/Q190746","display_name":"Advanced Encryption Standard","level":3,"score":0.4964635968208313},{"id":"https://openalex.org/C43364308","wikidata":"https://www.wikidata.org/wiki/Q8799","display_name":"Byte","level":2,"score":0.470562219619751},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4438515901565552},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4317156672477722},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.4255019426345825},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.41596004366874695},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.34072935581207275},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.32124805450439453},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.17544850707054138},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.1716690957546234},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13451501727104187},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09282901883125305}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2014.2384039","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2014.2384039","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.9100000262260437,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1541098965","https://openalex.org/W1568970091","https://openalex.org/W1972617203","https://openalex.org/W2072607061","https://openalex.org/W2099179520","https://openalex.org/W2109309427","https://openalex.org/W2112244944","https://openalex.org/W2113946930","https://openalex.org/W2130375286","https://openalex.org/W2154617277","https://openalex.org/W2159243841","https://openalex.org/W2162136091","https://openalex.org/W2163354454","https://openalex.org/W6632274306","https://openalex.org/W6668441287","https://openalex.org/W6677036316"],"related_works":["https://openalex.org/W2385743990","https://openalex.org/W3042604642","https://openalex.org/W3014521742","https://openalex.org/W2350176425","https://openalex.org/W4315926519","https://openalex.org/W2376611979","https://openalex.org/W3085294341","https://openalex.org/W2550887723","https://openalex.org/W2950551575","https://openalex.org/W2624134246"],"abstract_inverted_index":{"This":[0,65],"paper":[1],"describes":[2],"an":[3],"on-die":[4],"lightweight":[5],"nanoAES":[6],"hardware":[7],"accelerator,":[8],"fabricated":[9],"in":[10,54,86,204],"22":[11],"nm":[12],"tri-gate":[13],"high-k/metal-gate":[14],"CMOS,":[15],"targeted":[16],"for":[17],"ultra-low":[18],"power":[19,115],"symmetric-key":[20],"encryption":[21],"and":[22,75,79,97,113,166,196,208],"decryption":[23],"on":[24],"mobile":[25],"SOCs.":[26],"Compared":[27],"to":[28,49,213],"conventional":[29],"128":[30],"bit":[31,40],"AES":[32,52],"implementations,":[33],"this":[34],"design":[35],"uses":[36],"a":[37,69,87],"single":[38],"8":[39],"Sbox":[41],"circuit":[42,84],"along":[43,67],"with":[44,68,120,141,180,211],"ShiftRows":[45],"byte-order":[46],"data":[47],"processing":[48],"compute":[50],"all":[51],"rounds":[53],"native":[55],"GF(2":[56],"<sup":[57,61,94],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[58,62,95],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">4</sup>":[59],")":[60],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[63,96],"composite-field.":[64],"approach":[66],"serial-accumulating":[70],"MixColumns":[71],"circuit,":[72],"area-optimized":[73,206],"encrypt":[74,207],"decrypt":[76,209],"Galois-field":[77,199],"polynomials":[78,210],"integrated":[80],"on-the-fly":[81],"key":[82],"generation":[83],"results":[85],"compact":[88],"encrypt/decrypt":[89,135,161],"layout":[90],"occupying":[91],"2200/2736":[92],"\u03bcm":[93],"lowest-reported":[98],"gate":[99],"count":[100],"of":[101,110,117,123,137,144,151,163,170,185],"1947/2090":[102],"respectively,":[103,140,173],"while":[104],"achieving:":[105],"(i)":[106],"maximum":[107],"operating":[108,176],"frequency":[109],"1.133":[111],"GHz":[112],"total":[114,167],"consumption":[116,169],"13":[118],"mW":[119],"leakage":[121],"component":[122],"500":[124],"\u03bcW,":[125,189],"measured":[126,147,190],"at":[127,148,191,217],"0.9":[128],"V,":[129],"25":[130,194],"\u00b0C,":[131],"(ii)":[132],"nominal":[133],"AES-128":[134],"throughput":[136],"432/671":[138],"Mbps":[139],"peak":[142],"energy-efficiency":[143],"289":[145],"Gbps/W":[146],"near-threshold":[149],"operation":[150],"430":[152],"mV":[153],"(11":[154],"\u00d7higher":[155],"than":[156],"previously":[157],"reported":[158],"implementations),":[159],"(iii)":[160],"latencies":[162],"336/216":[164],"cycles":[165],"energy":[168],"3.9/2.5":[171],"nJ":[172],"(iv)":[174],"wide":[175],"supply":[177],"voltage":[178,183],"range":[179],"robust":[181],"sub-threshold":[182],"performance":[184],"45":[186],"Mbps,":[187],"170":[188],"340":[192],"mV,":[193],"\u00b0C":[195],"(v)":[197],"first-reported":[198],"polynomial-based":[200],"micro-architectural":[201],"co-optimization,":[202],"resulting":[203],"distinct":[205],"up":[212],"9%":[214],"area":[215],"reduction":[216],"iso-performance.":[218]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":10},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":11},{"year":2021,"cited_by_count":17},{"year":2020,"cited_by_count":10},{"year":2019,"cited_by_count":16},{"year":2018,"cited_by_count":25},{"year":2017,"cited_by_count":24},{"year":2016,"cited_by_count":12},{"year":2015,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
