{"id":"https://openalex.org/W2166155244","doi":"https://doi.org/10.1109/jssc.2013.2259031","title":"A Digital Phase-Locked Loop With Calibrated Coarse and Stochastic Fine TDC","display_name":"A Digital Phase-Locked Loop With Calibrated Coarse and Stochastic Fine TDC","publication_year":2013,"publication_date":"2013-06-26","ids":{"openalex":"https://openalex.org/W2166155244","doi":"https://doi.org/10.1109/jssc.2013.2259031","mag":"2166155244"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2013.2259031","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2013.2259031","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088006064","display_name":"Amer Samarah","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Amer Samarah","raw_affiliation_strings":["Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada","Edward S. Rogers Sr. Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, , Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"Edward S. Rogers Sr. Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, , Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010704016","display_name":"Anthony Chan Carusone","orcid":"https://orcid.org/0000-0002-0977-7516"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Anthony Chan Carusone","raw_affiliation_strings":["Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada","Edward S. Rogers Sr. Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, , Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ONT, Canada","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"Edward S. Rogers Sr. Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, , Canada","institution_ids":["https://openalex.org/I185261750"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5088006064"],"corresponding_institution_ids":["https://openalex.org/I185261750"],"apc_list":null,"apc_paid":null,"fwci":4.5599,"has_fulltext":false,"cited_by_count":55,"citation_normalized_percentile":{"value":0.95165307,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"48","issue":"8","first_page":"1829","last_page":"1841"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9947999715805054,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.706392228603363},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.6962369680404663},{"id":"https://openalex.org/keywords/phase","display_name":"Phase (matter)","score":0.5180473327636719},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.36651289463043213},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.3264746069908142},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.296310156583786},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1691664755344391}],"concepts":[{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.706392228603363},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.6962369680404663},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.5180473327636719},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.36651289463043213},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3264746069908142},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.296310156583786},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1691664755344391},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2013.2259031","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2013.2259031","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1535027829","https://openalex.org/W1579985208","https://openalex.org/W1974534995","https://openalex.org/W1990996078","https://openalex.org/W2041412774","https://openalex.org/W2084208879","https://openalex.org/W2096434843","https://openalex.org/W2097964046","https://openalex.org/W2108435403","https://openalex.org/W2109935697","https://openalex.org/W2110675623","https://openalex.org/W2117966934","https://openalex.org/W2122001378","https://openalex.org/W2126015560","https://openalex.org/W2129182275","https://openalex.org/W2129618067","https://openalex.org/W2144810145","https://openalex.org/W2145361466","https://openalex.org/W2146298723","https://openalex.org/W2149726555","https://openalex.org/W2150783292","https://openalex.org/W2151659230","https://openalex.org/W2164756901","https://openalex.org/W2166268103","https://openalex.org/W2166290265","https://openalex.org/W2177833654","https://openalex.org/W6654468519","https://openalex.org/W6675463404"],"related_works":["https://openalex.org/W2487398161","https://openalex.org/W2371800946","https://openalex.org/W2045086972","https://openalex.org/W2541388663","https://openalex.org/W2064263909","https://openalex.org/W2124947960","https://openalex.org/W2615196899","https://openalex.org/W2892778026","https://openalex.org/W2620615609","https://openalex.org/W2911871520"],"abstract_inverted_index":{"A":[0],"coarse-fine":[1],"time-to-digital":[2],"converter":[3],"(TDC)":[4],"is":[5,29,53,76,115,139],"presented":[6],"with":[7,149],"a":[8,14,20,25,40,79,91,144],"calibrated":[9],"coarse":[10,36,60],"stage":[11],"followed":[12],"by":[13,55,158],"stochastic":[15,71],"fine":[16,72],"stage.":[17],"On":[18],"power-up,":[19],"calibration":[21,51,154],"algorithm":[22,52],"based":[23],"on":[24],"code":[26],"density":[27],"test":[28],"used":[30],"to":[31,117],"minimize":[32],"nonlinearities":[33],"in":[34,85,102,131],"the":[35,44,50,59,63,70,103],"TDC.":[37,73,104],"By":[38],"using":[39],"balanced":[41],"mean":[42],"method,":[43],"number":[45],"of":[46,93,96,111,124],"registers":[47],"required":[48],"for":[49,143],"reduced":[54],"30%.":[56],"Based":[57],"upon":[58],"TDC":[61,75,119],"output,":[62],"appropriate":[64],"clock":[65],"signals":[66],"are":[67,100],"multiplexed":[68],"into":[69,78],"The":[74,88,135,153],"incorporated":[77],"1.99-2.5-GHz":[80],"digital":[81],"phase-locked":[82],"loop":[83,151],"(DPLL)":[84],"0.13-\u03bcm":[86],"CMOS.":[87],"DPLL":[89],"consumes":[90],"total":[92],"15.2":[94],"mW":[95,99],"which":[97,114],"4.4":[98],"consumed":[101],"Measurements":[105],"show":[106],"an":[107,122,128],"in-band":[108],"phase":[109],"noise":[110],"-107":[112],"dBc/Hz":[113],"equivalent":[116],"4-ps":[118],"resolution,":[120],"approximately":[121],"order":[123],"magnitude":[125],"better":[126],"than":[127],"inverter":[129],"delay":[130],"this":[132],"process":[133],"technology.":[134],"integrated":[136],"random":[137],"jitter":[138],"213":[140],"fs":[141],"rms":[142],"2-GHz":[145],"output":[146],"carrier":[147],"frequency":[148],"700-kHz":[150],"bandwidth.":[152],"reduces":[155],"worst-case":[156],"spurs":[157],"16":[159],"dB.":[160]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":6},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":6},{"year":2016,"cited_by_count":8},{"year":2015,"cited_by_count":8},{"year":2014,"cited_by_count":3}],"updated_date":"2026-05-01T08:36:08.643496","created_date":"2025-10-10T00:00:00"}