{"id":"https://openalex.org/W2147547264","doi":"https://doi.org/10.1109/jssc.2013.2258827","title":"A 2.3 nJ/Frame Voice Activity Detector-Based Audio Front-End for Context-Aware System-On-Chip Applications in 32-nm CMOS","display_name":"A 2.3 nJ/Frame Voice Activity Detector-Based Audio Front-End for Context-Aware System-On-Chip Applications in 32-nm CMOS","publication_year":2013,"publication_date":"2013-05-24","ids":{"openalex":"https://openalex.org/W2147547264","doi":"https://doi.org/10.1109/jssc.2013.2258827","mag":"2147547264"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2013.2258827","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2013.2258827","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5091408102","display_name":"Arijit Raychowdhury","orcid":"https://orcid.org/0000-0001-8391-0576"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Arijit Raychowdhury","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112838079","display_name":"Carlos Tokunaga","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Carlos Tokunaga","raw_affiliation_strings":["Intel Laboratories, Intel, Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069694735","display_name":"W.M. Beltman","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Willem Beltman","raw_affiliation_strings":["Intel Laboratories, Intel, Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064741703","display_name":"Michael Deisher","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael Deisher","raw_affiliation_strings":["Intel Atom SoC Architecture Group, Intel Hillsboro, Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Atom SoC Architecture Group, Intel Hillsboro, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067753561","display_name":"James Tschanz","orcid":"https://orcid.org/0000-0003-0317-4332"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"James W. Tschanz","raw_affiliation_strings":["Intel Laboratories, Intel, Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076642880","display_name":"Vivek De","orcid":"https://orcid.org/0000-0001-5207-1079"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vivek De","raw_affiliation_strings":["Intel Laboratories, Intel, Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5091408102"],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":1.9985,"has_fulltext":false,"cited_by_count":52,"citation_normalized_percentile":{"value":0.86104913,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"48","issue":"8","first_page":"1963","last_page":"1969"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5909795165061951},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5709682703018188},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5449302792549133},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5129168033599854},{"id":"https://openalex.org/keywords/frame","display_name":"Frame (networking)","score":0.5065957307815552},{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.502980649471283},{"id":"https://openalex.org/keywords/front-and-back-ends","display_name":"Front and back ends","score":0.4792482852935791},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.45426952838897705},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.45378774404525757},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45308932662010193},{"id":"https://openalex.org/keywords/voice-activity-detection","display_name":"Voice activity detection","score":0.4490990936756134},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.4423671364784241},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.43888312578201294},{"id":"https://openalex.org/keywords/frequency-scaling","display_name":"Frequency scaling","score":0.43830546736717224},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.43173089623451233},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3282032310962677},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3045320510864258},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25690793991088867},{"id":"https://openalex.org/keywords/speech-recognition","display_name":"Speech recognition","score":0.19816645979881287},{"id":"https://openalex.org/keywords/speech-processing","display_name":"Speech processing","score":0.19055113196372986},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13507500290870667},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10759890079498291}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5909795165061951},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5709682703018188},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5449302792549133},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5129168033599854},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.5065957307815552},{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.502980649471283},{"id":"https://openalex.org/C53016008","wikidata":"https://www.wikidata.org/wiki/Q620167","display_name":"Front and back ends","level":2,"score":0.4792482852935791},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.45426952838897705},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.45378774404525757},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45308932662010193},{"id":"https://openalex.org/C204201278","wikidata":"https://www.wikidata.org/wiki/Q1332614","display_name":"Voice activity detection","level":3,"score":0.4490990936756134},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.4423671364784241},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.43888312578201294},{"id":"https://openalex.org/C157742956","wikidata":"https://www.wikidata.org/wiki/Q3237776","display_name":"Frequency scaling","level":3,"score":0.43830546736717224},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.43173089623451233},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3282032310962677},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3045320510864258},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25690793991088867},{"id":"https://openalex.org/C28490314","wikidata":"https://www.wikidata.org/wiki/Q189436","display_name":"Speech recognition","level":1,"score":0.19816645979881287},{"id":"https://openalex.org/C61328038","wikidata":"https://www.wikidata.org/wiki/Q3358061","display_name":"Speech processing","level":2,"score":0.19055113196372986},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13507500290870667},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10759890079498291},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2013.2258827","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2013.2258827","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1491082069","https://openalex.org/W1679032957","https://openalex.org/W2025847799","https://openalex.org/W2064266963","https://openalex.org/W2098740348","https://openalex.org/W2099086364","https://openalex.org/W2099490452","https://openalex.org/W2134128809","https://openalex.org/W2166577902","https://openalex.org/W2486913545","https://openalex.org/W6656891329"],"related_works":["https://openalex.org/W2109699519","https://openalex.org/W2006568360","https://openalex.org/W970262775","https://openalex.org/W102726818","https://openalex.org/W4233616027","https://openalex.org/W2059591361","https://openalex.org/W4244724753","https://openalex.org/W2070693700","https://openalex.org/W2971689244","https://openalex.org/W2064074511"],"abstract_inverted_index":{"Advanced":[0],"human-machine":[1],"interfaces":[2],"require":[3],"improved":[4],"embedded":[5,46],"sensors":[6],"that":[7],"can":[8,102],"seamlessly":[9],"interact":[10],"with":[11,37],"the":[12,79,100],"user.":[13],"Voice-based":[14],"communication":[15],"has":[16,63],"emerged":[17],"as":[18],"a":[19,49,59,110],"promising":[20],"interface":[21],"for":[22,44],"next":[23],"generation":[24],"mobile,":[25],"automotive":[26],"and":[27,58],"hands-free":[28],"devices.":[29],"Presented":[30],"here":[31],"is":[32,91],"such":[33],"an":[34],"audio":[35,104],"front-end":[36],"Voice":[38],"Activity":[39],"Detection":[40],"(VAD)":[41],"hardware":[42],"targeted":[43],"low-power":[45],"SoCs,":[47],"featuring":[48],"512":[50],"pt":[51],"FFT,":[52],"programmable":[53],"filters,":[54],"noise":[55],"floor":[56],"estimator":[57],"decision":[60],"engine":[61],"which":[62],"been":[64],"fabricated":[65],"in":[66],"32":[67],"nm":[68],"CMOS.":[69],"The":[70],"dual-V":[71],"<sub":[72],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[73],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">CC</sub>":[74],",":[75],"dual-frequency":[76],"design":[77],"allows":[78],"core":[80,101],"datapath":[81],"to":[82,84],"scale":[83],"near-threshold":[85],"voltage":[86,115],"(NTV),":[87],"where":[88],"power":[89],"consumption":[90],"less":[92],"than":[93],"50":[94],"uW.":[95],"At":[96],"peak":[97],"energy":[98],"efficiency,":[99],"process":[103],"data":[105],"at":[106],"2.3":[107],"nJ/frame":[108],"-":[109],"9.4X":[111],"improvement":[112],"over":[113],"nominal":[114],"conditions.":[116]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":7},{"year":2021,"cited_by_count":7},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":7},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":6},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}