{"id":"https://openalex.org/W2056358418","doi":"https://doi.org/10.1109/jssc.2013.2253401","title":"A Programmable Calibration/BIST Engine for RF and Analog Blocks in SoCs Integrated in a 32 nm CMOS WiFi Transceiver","display_name":"A Programmable Calibration/BIST Engine for RF and Analog Blocks in SoCs Integrated in a 32 nm CMOS WiFi Transceiver","publication_year":2013,"publication_date":"2013-03-27","ids":{"openalex":"https://openalex.org/W2056358418","doi":"https://doi.org/10.1109/jssc.2013.2253401","mag":"2056358418"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2013.2253401","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2013.2253401","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://lirias.kuleuven.be/handle/123456789/437892","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5105691007","display_name":"Jorge Carballido","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210088691","display_name":"Secretar\u00eda de Salud de Jalisco","ror":"https://ror.org/0070wyz29","country_code":"MX","type":"government","lineage":["https://openalex.org/I4210088691"]}],"countries":["MX","US"],"is_corresponding":false,"raw_author_name":"Jorge Carballido","raw_affiliation_strings":["System Integration and Adaptivity Group, Intel Laboratories, Guadalajara, Jalisco, Mexico","Syst. Integration & Adaptivity Group, Intel Labs., Guadalajara, Mexico"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"System Integration and Adaptivity Group, Intel Laboratories, Guadalajara, Jalisco, Mexico","institution_ids":["https://openalex.org/I4210088691"]},{"raw_affiliation_string":"Syst. Integration & Adaptivity Group, Intel Labs., Guadalajara, Mexico","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006028746","display_name":"Jorge Hermosillo","orcid":"https://orcid.org/0000-0001-9040-767X"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jorge Hermosillo","raw_affiliation_strings":["Platform Validation and Engineering Group, Intel Architecture Group, Guadalajara, Jalisco, Mexico","Intel Archit. Group, Guadalajara, Mexico"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Platform Validation and Engineering Group, Intel Architecture Group, Guadalajara, Jalisco, Mexico","institution_ids":[]},{"raw_affiliation_string":"Intel Archit. Group, Guadalajara, Mexico","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031339820","display_name":"Arturo Veloz","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210088691","display_name":"Secretar\u00eda de Salud de Jalisco","ror":"https://ror.org/0070wyz29","country_code":"MX","type":"government","lineage":["https://openalex.org/I4210088691"]}],"countries":["MX","US"],"is_corresponding":false,"raw_author_name":"Arturo Veloz","raw_affiliation_strings":["System Integration and Adaptivity Group, Intel Laboratories, Guadalajara, Jalisco, Mexico","Syst. Integration & Adaptivity Group, Intel Labs., Guadalajara, Mexico"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"System Integration and Adaptivity Group, Intel Laboratories, Guadalajara, Jalisco, Mexico","institution_ids":["https://openalex.org/I4210088691"]},{"raw_affiliation_string":"Syst. Integration & Adaptivity Group, Intel Labs., Guadalajara, Mexico","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029023782","display_name":"David Arditti","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210088691","display_name":"Secretar\u00eda de Salud de Jalisco","ror":"https://ror.org/0070wyz29","country_code":"MX","type":"government","lineage":["https://openalex.org/I4210088691"]}],"countries":["MX","US"],"is_corresponding":false,"raw_author_name":"David Arditti","raw_affiliation_strings":["System Integration and Adaptivity Group, Intel Laboratories, Guadalajara, Jalisco, Mexico","Syst. Integration & Adaptivity Group, Intel Labs., Guadalajara, Mexico"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"System Integration and Adaptivity Group, Intel Laboratories, Guadalajara, Jalisco, Mexico","institution_ids":["https://openalex.org/I4210088691"]},{"raw_affiliation_string":"Syst. Integration & Adaptivity Group, Intel Labs., Guadalajara, Mexico","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111769995","display_name":"Alberto Del Rio","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Alberto Del Rio","raw_affiliation_strings":["Processor BT Validation and Tools Group, Software and Services Group, Guadalajara, Jalisco, Mexico","Software & Services Group, Guadalajara, Mexico"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Processor BT Validation and Tools Group, Software and Services Group, Guadalajara, Jalisco, Mexico","institution_ids":[]},{"raw_affiliation_string":"Software & Services Group, Guadalajara, Mexico","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004930390","display_name":"Edgar Borrayo","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210088691","display_name":"Secretar\u00eda de Salud de Jalisco","ror":"https://ror.org/0070wyz29","country_code":"MX","type":"government","lineage":["https://openalex.org/I4210088691"]}],"countries":["MX","US"],"is_corresponding":false,"raw_author_name":"Edgar Borrayo","raw_affiliation_strings":["System Integration and Adaptivity Group, Intel Laboratories, Guadalajara, Jalisco, Mexico","Syst. Integration & Adaptivity Group, Intel Labs., Guadalajara, Mexico"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"System Integration and Adaptivity Group, Intel Laboratories, Guadalajara, Jalisco, Mexico","institution_ids":["https://openalex.org/I4210088691"]},{"raw_affiliation_string":"Syst. Integration & Adaptivity Group, Intel Labs., Guadalajara, Mexico","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103488109","display_name":"Manuel E. Guzman","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210088691","display_name":"Secretar\u00eda de Salud de Jalisco","ror":"https://ror.org/0070wyz29","country_code":"MX","type":"government","lineage":["https://openalex.org/I4210088691"]}],"countries":["MX","US"],"is_corresponding":false,"raw_author_name":"Manuel E. Guzman","raw_affiliation_strings":["System Integration and Adaptivity Group, Intel Laboratories, Guadalajara, Jalisco, Mexico","Syst. Integration & Adaptivity Group, Intel Labs., Guadalajara, Mexico"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"System Integration and Adaptivity Group, Intel Laboratories, Guadalajara, Jalisco, Mexico","institution_ids":["https://openalex.org/I4210088691"]},{"raw_affiliation_string":"Syst. Integration & Adaptivity Group, Intel Labs., Guadalajara, Mexico","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002626327","display_name":"Hasnain Lakdawala","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087596","display_name":"Qualcomm (United States)","ror":"https://ror.org/002zrf773","country_code":"US","type":"company","lineage":["https://openalex.org/I4210087596"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hasnain Lakdawala","raw_affiliation_strings":["Qualcomm Technologies, Inc., San Diego, CA, USA","Qualcomm Technology Inc., San Diego, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Qualcomm Technologies, Inc., San Diego, CA, USA","institution_ids":["https://openalex.org/I4210087596"]},{"raw_affiliation_string":"Qualcomm Technology Inc., San Diego, CA, USA","institution_ids":["https://openalex.org/I4210087596"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012150553","display_name":"Marian Verhelst","orcid":"https://orcid.org/0000-0003-3495-9263"},"institutions":[{"id":"https://openalex.org/I99464096","display_name":"KU Leuven","ror":"https://ror.org/05f950310","country_code":"BE","type":"education","lineage":["https://openalex.org/I99464096"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Marian Verhelst","raw_affiliation_strings":["Microelectronics and Sensors division (MICAS), ESAT, University of Leuven, Leuven, Belgium","Dept. of Electr. Eng. (ESAT), Univ. of Leuven, Leuven, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronics and Sensors division (MICAS), ESAT, University of Leuven, Leuven, Belgium","institution_ids":["https://openalex.org/I99464096"]},{"raw_affiliation_string":"Dept. of Electr. Eng. (ESAT), Univ. of Leuven, Leuven, Belgium","institution_ids":["https://openalex.org/I99464096"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":9,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.903,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.85980021,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"48","issue":"7","first_page":"1669","last_page":"1679"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.8107613325119019},{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.6283975839614868},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6211763024330139},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.6165251135826111},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5919238924980164},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5328066349029541},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4414519667625427},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.373007595539093},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3059356212615967},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07717961072921753}],"concepts":[{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.8107613325119019},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.6283975839614868},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6211763024330139},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.6165251135826111},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5919238924980164},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5328066349029541},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4414519667625427},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.373007595539093},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3059356212615967},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07717961072921753},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/jssc.2013.2253401","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2013.2253401","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},{"id":"pmh:oai:lirias2repo.kuleuven.be:123456789/437892","is_oa":true,"landing_page_url":"https://lirias.kuleuven.be/handle/123456789/437892","pdf_url":null,"source":{"id":"https://openalex.org/S4306401954","display_name":"Lirias (KU Leuven)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I99464096","host_organization_name":"KU Leuven","host_organization_lineage":["https://openalex.org/I99464096"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Journal of Solid-State Circuits, vol. 48 (7), (1669-1679)","raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":{"id":"pmh:oai:lirias2repo.kuleuven.be:123456789/437892","is_oa":true,"landing_page_url":"https://lirias.kuleuven.be/handle/123456789/437892","pdf_url":null,"source":{"id":"https://openalex.org/S4306401954","display_name":"Lirias (KU Leuven)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I99464096","host_organization_name":"KU Leuven","host_organization_lineage":["https://openalex.org/I99464096"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Journal of Solid-State Circuits, vol. 48 (7), (1669-1679)","raw_type":"info:eu-repo/semantics/publishedVersion"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1572300106","https://openalex.org/W1677014629","https://openalex.org/W1882885596","https://openalex.org/W1973847976","https://openalex.org/W1982575274","https://openalex.org/W2000468931","https://openalex.org/W2038780791","https://openalex.org/W2115098810","https://openalex.org/W2125293414","https://openalex.org/W2133679005","https://openalex.org/W2138450526","https://openalex.org/W2151670793","https://openalex.org/W2155260992","https://openalex.org/W2165745488","https://openalex.org/W2167973072","https://openalex.org/W6637292864"],"related_works":["https://openalex.org/W4249165909","https://openalex.org/W2783437851","https://openalex.org/W1672137312","https://openalex.org/W1650483958","https://openalex.org/W2320869333","https://openalex.org/W2110290642","https://openalex.org/W2744385696","https://openalex.org/W2136659592","https://openalex.org/W2115569193","https://openalex.org/W2161127017"],"abstract_inverted_index":{"This":[0,119],"paper":[1],"presents":[2],"a":[3,25,33,64,102,106],"flexible":[4],"and":[5,13,43,54,66,81,130],"portable":[6],"digital":[7],"framework":[8],"for":[9,47,78,142],"Built-in":[10],"Self-Test":[11],"(BIST)":[12],"calibration":[14,55,65],"of":[15,32,50,116,124],"RF/analog":[16],"circuitry.":[17],"Novel":[18],"to":[19,75,86,112,137,147],"the":[20,71,114],"proposed":[21],"testing":[22,149],"framework,":[23],"is":[24,61],"reusable,":[26],"flexible,":[27],"drop-in":[28],"IP":[29],"core,":[30],"composed":[31],"centralized":[34],"custom":[35],"processing":[36],"engine":[37,60,97],"with":[38,63,101],"data":[39],"path,":[40],"memory":[41],"architecture":[42],"instruction":[44],"set":[45],"optimized":[46],"efficient":[48],"execution":[49],"compute":[51],"intensive":[52],"test":[53,67,73,110],"algorithms.":[56],"The":[57,96],"innovative":[58],"BIST":[59],"complemented":[62],"sequencing":[68],"methodology":[69],"exploiting":[70],"embedded":[72],"hardware,":[74],"dynamically":[76],"correct":[77],"transceiver":[79,104],"imbalances":[80],"non-idealities,":[82],"as":[83,85,91],"well":[84],"estimate":[87],"performance":[88,133],"parameters":[89],"such":[90],"Error":[92],"Vector":[93],"Magnitude":[94],"(EVM).":[95],"has":[98],"been":[99],"integrated":[100],"WiFi":[103],"in":[105,140],"32":[107],"nm":[108],"SoC":[109],"chip":[111],"demonstrate":[113],"functionality":[115],"this":[117],"framework.":[118],"implementation":[120],"covers":[121],"an":[122],"area":[123],"0.63":[125],"mm":[126],"<sup":[127],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[128],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[129],"provides":[131],"similar":[132],"(e.g.,":[134],"improvements":[135],"up":[136],"10":[138],"dB":[139],"EVM":[141],"Rx":[143],"IQ":[144],"imbalance":[145],"compensation)":[146],"off-chip":[148],"without":[150],"relying":[151],"on":[152],"expensive":[153],"equipment.":[154]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
