{"id":"https://openalex.org/W2010205010","doi":"https://doi.org/10.1109/jssc.2012.2217631","title":"2.4 Gbps, 7 mW All-Digital PVT-Variation Tolerant True Random Number Generator for 45 nm CMOS High-Performance Microprocessors","display_name":"2.4 Gbps, 7 mW All-Digital PVT-Variation Tolerant True Random Number Generator for 45 nm CMOS High-Performance Microprocessors","publication_year":2012,"publication_date":"2012-10-24","ids":{"openalex":"https://openalex.org/W2010205010","doi":"https://doi.org/10.1109/jssc.2012.2217631","mag":"2010205010"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2012.2217631","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2012.2217631","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039276616","display_name":"Sanu Mathew","orcid":"https://orcid.org/0000-0003-1344-7533"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sanu K. Mathew","raw_affiliation_strings":["Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078427610","display_name":"Suresh Srinivasan","orcid":"https://orcid.org/0000-0002-0228-8795"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Suresh Srinivasan","raw_affiliation_strings":["Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052106795","display_name":"Mark Anders","orcid":"https://orcid.org/0000-0001-5748-8420"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark A. Anders","raw_affiliation_strings":["Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081032347","display_name":"Himanshu Kaul","orcid":"https://orcid.org/0000-0003-1586-7486"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Himanshu Kaul","raw_affiliation_strings":["Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109275074","display_name":"Steven K. Hsu","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Steven K. Hsu","raw_affiliation_strings":["Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088477949","display_name":"Farhana Sheikh","orcid":"https://orcid.org/0000-0001-5078-0816"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Farhana Sheikh","raw_affiliation_strings":["Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006348328","display_name":"Amit Agarwal","orcid":"https://orcid.org/0000-0002-4220-3346"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Amit Agarwal","raw_affiliation_strings":["Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075692568","display_name":"Sudhir Satpathy","orcid":"https://orcid.org/0000-0003-3511-3526"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sudhir Satpathy","raw_affiliation_strings":["Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074107306","display_name":"Ram Krishnamurthy","orcid":"https://orcid.org/0000-0002-2428-7099"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ram K. Krishnamurthy","raw_affiliation_strings":["Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research Laboratory, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":3.73,"has_fulltext":false,"cited_by_count":193,"citation_normalized_percentile":{"value":0.93276007,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":98,"max":100},"biblio":{"volume":"47","issue":"11","first_page":"2807","last_page":"2821"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":0.9897000193595886,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9794999957084656,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/random-number-generation","display_name":"Random number generation","score":0.8132535219192505},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6985281109809875},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5530741810798645},{"id":"https://openalex.org/keywords/entropy","display_name":"Entropy (arrow of time)","score":0.4755775034427643},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36733126640319824},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.34684479236602783},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2750500440597534},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17124465107917786}],"concepts":[{"id":"https://openalex.org/C201866948","wikidata":"https://www.wikidata.org/wiki/Q228206","display_name":"Random number generation","level":2,"score":0.8132535219192505},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6985281109809875},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5530741810798645},{"id":"https://openalex.org/C106301342","wikidata":"https://www.wikidata.org/wiki/Q4117933","display_name":"Entropy (arrow of time)","level":2,"score":0.4755775034427643},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36733126640319824},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.34684479236602783},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2750500440597534},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17124465107917786},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2012.2217631","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2012.2217631","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9200000166893005,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320307102","display_name":"Intel Corporation","ror":"https://ror.org/01ek73717"},{"id":"https://openalex.org/F4320332222","display_name":"University of Illinois at Urbana-Champaign","ror":"https://ror.org/047426m28"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1588877666","https://openalex.org/W2001894083","https://openalex.org/W2004694319","https://openalex.org/W2031590600","https://openalex.org/W2033711887","https://openalex.org/W2090888886","https://openalex.org/W2095609723","https://openalex.org/W2098543956","https://openalex.org/W2111877940","https://openalex.org/W2113158626","https://openalex.org/W2117205818","https://openalex.org/W2132979456","https://openalex.org/W2150778842","https://openalex.org/W2160990975","https://openalex.org/W2162517322","https://openalex.org/W2696718061","https://openalex.org/W3140517496","https://openalex.org/W6635070356","https://openalex.org/W6650975361","https://openalex.org/W6682151157"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2051487156","https://openalex.org/W2073681303","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W4306968100","https://openalex.org/W2171986175","https://openalex.org/W2544423928","https://openalex.org/W2089791793","https://openalex.org/W2109445684"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"an":[3,66,187],"all-digital":[4,231],"PVT-variation":[5],"tolerant":[6],"true-random":[7],"number":[8],"generator":[9],"(TRNG),":[10],"fabricated":[11],"in":[12,22,178,215,220],"45":[13],"nm":[14,217],"high-k/metal-gate":[15],"CMOS,":[16],"targeted":[17],"for":[18,173,193,212],"on-die":[19],"entropy":[20,138],"generation":[21],"high-performance":[23],"microprocessors.":[24],"The":[25],"TRNG":[26,175],"harvests":[27],"differential":[28],"thermal-noise":[29],"at":[30,111,164],"the":[31,174,221,230],"diffusion":[32],"nodes":[33],"of":[34,43,81,134,139,145,158,223,229],"a":[35,85],"pre-charged":[36],"cross-coupled":[37],"inverter":[38],"pair":[39],"to":[40,72,129,176,233],"resolve":[41],"out":[42],"metastability,":[44],"generating":[45],"one":[46],"random":[47,96,116],"bit/cycle.":[48],"A":[49],"self-calibrating":[50],"2-step":[51],"tuning":[52],"mechanism":[53],"using":[54,186],"coarse-grained":[55],"configurable":[56],"inverters":[57],"and":[58,141,197,202],"fine-grained":[59,170],"programmable":[60],"clock":[61],"delay":[62],"generators,":[63],"along":[64],"with":[65,84,104,124,136,153],"entropy-tracking":[67],"feedback":[68],"loop":[69],"provide":[70],"tolerance":[71],"20%":[73],"PVT":[74],"variation-induced":[75],"device":[76],"mismatches,":[77],"enabling":[78],"lowest-reported":[79],"energy-consumption":[80],"2.9":[82],"pJ/bit":[83],"dense":[86],"layout":[87],"occupying":[88],"4004":[89],"\u03bcm2,":[90],"while":[91,185],"achieving:":[92],"(i)":[93],"2.4":[94],"Gbps":[95],"bit":[97],"throughput,":[98],"7":[99],"mW":[100,106],"total":[101],"power":[102,108],"consumption":[103],"0.7":[105],"leakage":[107],"component,":[109],"measured":[110,127,163],"1.1":[112],"V,":[113],"50\u00b0C,":[114,167],"(ii)":[115],"bitstreams":[117],"that":[118],"passes":[119],"all":[120],"NIST":[121],"RNG":[122],"tests":[123],"raw":[125],"entropy/bit":[126],"up":[128],"0.9999999993,":[130],"(iii)":[131],"good":[132],"distribution":[133],"1's":[135],"4-bit":[137],"3.97996":[140],"high-entropy":[142,171],"pattern":[143,195],"probability":[144],"0.066":[146],"(iv)":[147],"wide":[148],"operating":[149],"supply":[150],"voltage":[151,156],"range":[152],"robust":[154,213],"sub-threshold":[155],"performance":[157],"14":[159],"Mbps,":[160],"5.6":[161],"\u03bcW,":[162],"280":[165],"mV,":[166],"(v)":[168],"12":[169],"settings":[172],"dither":[177],"during":[179],"steady-state":[180],"operation,":[181],"(vi)":[182],"<;3%":[183],"error":[184],"analytical":[188],"ergodic":[189],"Markov":[190],"chain":[191],"model":[192],"predicting":[194],"probabilities":[196],"(vii)":[198],"200x":[199],"higher":[200,204],"throughput":[201],"9x":[203],"energy-efficiency":[205],"than":[206],"previously":[207],"reported":[208],"implementations.":[209],"Design":[210],"modifications":[211],"operation":[214],"22":[216],"high-volume":[218],"manufacturing":[219],"presence":[222],"3\u03c3":[224],"process":[225],"variations":[226],"demonstrate":[227],"scalability":[228],"design":[232],"future":[234],"technologies.":[235]},"counts_by_year":[{"year":2026,"cited_by_count":4},{"year":2025,"cited_by_count":14},{"year":2024,"cited_by_count":16},{"year":2023,"cited_by_count":8},{"year":2022,"cited_by_count":23},{"year":2021,"cited_by_count":20},{"year":2020,"cited_by_count":22},{"year":2019,"cited_by_count":28},{"year":2018,"cited_by_count":17},{"year":2017,"cited_by_count":17},{"year":2016,"cited_by_count":11},{"year":2015,"cited_by_count":7},{"year":2014,"cited_by_count":6}],"updated_date":"2026-08-12T21:12:35.861297","created_date":"2025-10-10T00:00:00"}
