{"id":"https://openalex.org/W1985745236","doi":"https://doi.org/10.1109/jssc.2012.2194847","title":"A Digitally Enhanced Dynamically Reconfigurable Analog Platform for Low-Power Signal Processing","display_name":"A Digitally Enhanced Dynamically Reconfigurable Analog Platform for Low-Power Signal Processing","publication_year":2012,"publication_date":"2012-05-30","ids":{"openalex":"https://openalex.org/W1985745236","doi":"https://doi.org/10.1109/jssc.2012.2194847","mag":"1985745236"},"language":"en","primary_location":{"id":"doi:10.1109/jssc.2012.2194847","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2012.2194847","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5091068770","display_name":"Craig Schlottmann","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Craig R. Schlottmann","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085487382","display_name":"Samuel Shapero","orcid":"https://orcid.org/0000-0002-7633-0183"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Samuel Shapero","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089127443","display_name":"Stephen Nease","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Stephen Nease","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5105781337","display_name":"P. Hasler","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Paul Hasler","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5091068770"],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":4.50462947,"has_fulltext":false,"cited_by_count":54,"citation_normalized_percentile":{"value":0.94466533,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"47","issue":"9","first_page":"2174","last_page":"2184"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6467689871788025},{"id":"https://openalex.org/keywords/field-programmable-analog-array","display_name":"Field-programmable analog array","score":0.6315745115280151},{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.6052270531654358},{"id":"https://openalex.org/keywords/analog-multiplier","display_name":"Analog multiplier","score":0.5710360407829285},{"id":"https://openalex.org/keywords/analog-signal-processing","display_name":"Analog signal processing","score":0.5511191487312317},{"id":"https://openalex.org/keywords/analog-image-processing","display_name":"Analog image processing","score":0.5418809652328491},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5299269556999207},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.4923340082168579},{"id":"https://openalex.org/keywords/interfacing","display_name":"Interfacing","score":0.4892852008342743},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.4875757098197937},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4734762907028198},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4623696804046631},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.4526680111885071},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4393296539783478},{"id":"https://openalex.org/keywords/analog-device","display_name":"Analog device","score":0.43116873502731323},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.41515517234802246},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.403215229511261},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3987756669521332},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22989952564239502},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.12166929244995117},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1029738187789917},{"id":"https://openalex.org/keywords/digital-image-processing","display_name":"Digital image processing","score":0.08562737703323364}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6467689871788025},{"id":"https://openalex.org/C149128552","wikidata":"https://www.wikidata.org/wiki/Q380201","display_name":"Field-programmable analog array","level":5,"score":0.6315745115280151},{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.6052270531654358},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.5710360407829285},{"id":"https://openalex.org/C379707","wikidata":"https://www.wikidata.org/wiki/Q2328303","display_name":"Analog signal processing","level":4,"score":0.5511191487312317},{"id":"https://openalex.org/C28525508","wikidata":"https://www.wikidata.org/wiki/Q4751054","display_name":"Analog image processing","level":5,"score":0.5418809652328491},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5299269556999207},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.4923340082168579},{"id":"https://openalex.org/C2776303644","wikidata":"https://www.wikidata.org/wiki/Q1020499","display_name":"Interfacing","level":2,"score":0.4892852008342743},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.4875757098197937},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4734762907028198},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4623696804046631},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.4526680111885071},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4393296539783478},{"id":"https://openalex.org/C90711627","wikidata":"https://www.wikidata.org/wiki/Q3742408","display_name":"Analog device","level":4,"score":0.43116873502731323},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.41515517234802246},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.403215229511261},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3987756669521332},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22989952564239502},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.12166929244995117},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1029738187789917},{"id":"https://openalex.org/C104317675","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Digital image processing","level":4,"score":0.08562737703323364},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2012.2194847","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2012.2194847","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1578671836","https://openalex.org/W1912348100","https://openalex.org/W1977976273","https://openalex.org/W2014385882","https://openalex.org/W2017216250","https://openalex.org/W2027400580","https://openalex.org/W2035371449","https://openalex.org/W2041608551","https://openalex.org/W2046857741","https://openalex.org/W2078878966","https://openalex.org/W2104794633","https://openalex.org/W2114745572","https://openalex.org/W2115129967","https://openalex.org/W2118249063","https://openalex.org/W2128890914","https://openalex.org/W2133577890","https://openalex.org/W2134007722","https://openalex.org/W2138487966","https://openalex.org/W2149992244","https://openalex.org/W2159989367","https://openalex.org/W2164092018","https://openalex.org/W6679703066"],"related_works":["https://openalex.org/W2061402905","https://openalex.org/W4233024123","https://openalex.org/W1489445348","https://openalex.org/W2323148014","https://openalex.org/W1624706916","https://openalex.org/W1792053179","https://openalex.org/W4234945196","https://openalex.org/W1511245507","https://openalex.org/W1987033534","https://openalex.org/W3047246479"],"abstract_inverted_index":{"We":[0,156],"present":[1],"a":[2,42,107,158,190,200],"field-programmable":[3],"analog":[4,20,37,56,86,122,186],"array":[5],"designed":[6],"for":[7,58,76,140],"accurate":[8],"low-power":[9,77],"mixed-signal":[10,30,201],"computation.":[11,177],"This":[12],"25-mm":[13],"<sup":[14],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[15],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[16],"350":[17],"nm-CMOS":[18],"reconfigurable":[19,192],"IC":[21],"incorporates":[22],"digital":[23,100,115,148],"enhancements":[24],"to":[25,88,173],"increase":[26],"compatibility":[27],"in":[28],"embedded":[29],"systems.":[31],"The":[32,147],"chip":[33],"contains":[34],"78":[35],"computational":[36],"blocks":[38],"(CABs)":[39],"which":[40,164],"house":[41],"variety":[43],"of":[44,54,110,130,135,182],"processing":[45],"elements.":[46],"There":[47],"are":[48],"36":[49],"general":[50],"CABs":[51,94],"with":[52,66],"hundreds":[53],"common":[55],"primitives":[57],"computation,":[59],"18":[60],"digital-to-analog":[61],"converter":[62],"(DAC)":[63],"CABs,":[64,75],"each":[65],"8-b":[67],"compilable":[68],"DAC":[69],"capabilities,":[70],"and":[71,95,102,117,133,144,199],"24":[72],"vector-matrix":[73],"multiplier":[74],"parallel":[78],"processing.":[79],"A":[80],"floating-gate":[81,161],"routing":[82],"matrix":[83],"connects":[84],"these":[85],"elements":[87],"one":[89],"another,":[90],"both":[91],"within":[92],"individual":[93],"between":[96],"CABs.":[97],"To":[98,178],"facilitate":[99],"interfacing":[101],"dynamic":[103],"reconfigurability,":[104],"we":[105,188],"included":[106],"novel":[108],"network":[109],"volatile":[111],"switches":[112,127,166],"based":[113],"on":[114],"shift":[116],"select":[118],"registers":[119,149],"that":[120,167],"control":[121],"switches.":[123],"These":[124],"dynamically":[125,191],"controlled":[126],"span":[128],"all":[129],"the":[131,136,180],"rows":[132],"columns":[134],"internal":[137],"routing,":[138],"allowing":[139],"run-time":[141],"system":[142],"modification":[143],"scanning":[145],"I/O.":[146],"can":[150],"also":[151],"double":[152],"as":[153],"on-chip":[154],"memory.":[155],"introduce":[157],"new":[159],"hybrid":[160],"switch":[162],"matrix,":[163],"includes":[165],"eliminate":[168],"previously":[169],"observed":[170],"mismatch":[171],"issues":[172],"provide":[174],"highly":[175],"precise":[176],"highlight":[179],"potential":[181],"this":[183],"digitally":[184],"enhanced":[185],"processor,":[187],"demonstrate":[189],"image":[193],"transformer,":[194],"an":[195],"arbitrary":[196],"waveform":[197],"generator,":[198],"FIR":[202],"filter.":[203]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":6},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":7},{"year":2015,"cited_by_count":7},{"year":2014,"cited_by_count":6},{"year":2013,"cited_by_count":7},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}